TLV2553

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SLAS354C – SEPTEMBER 2001 – REVISED SEPTEMBER 2015

Table 2. Command Set (CMR) and Configuration

SDI D[7:4]

COMMAND

Binary

HEX

CFGR1

0000b

0h

SELECT analog input channel 0

SDI D[3:0]

CONFIGURATION

0001b

1h

SELECT analog input channel 1

D[3:2]

01: 8-bit output length

0010b

2h

SELECT analog input channel 2

X0: 12-bit output length (see Note)

0011b

3h

SELECT analog input channel 3

11: 16-bit output length

0100b

4h

SELECT analog input channel 4

D1

0: MSB out first

0101b

5h

SELECT analog input channel 5

1: LSB out first

0110b

6h

SELECT analog input channel 6

D0

0: Unipolar binary

0111b

7h

SELECT analog input channel 7

1: Bipolar 2s complement

1000b

8h

SELECT analog input channel 8

Note: Select 12-bit output mode to achieve 200 KSPS sampling rate.

1001b

9h

SELECT analog input channel 9

1010b

Ah

SELECT analog input channel 10

1011b

Bh

SELECT TEST, Voltage = (VREF+ + VREF–)/2

1100b

Ch

SELECT TEST, Voltage = REFM

1101b

Dh

SELECT TEST, Voltage = REFP

1110b

Eh

SW POWERDOWN (analog + reference)

1111b

Fh

Reserved

8.4.7 Data Input—Address/Command Bits

The four MSBs (D7–D4) of the input data register are the address or command. These can be used to address

one of the 11 input channels, address one of three reference-test voltages, or activate software power-down

mode. All address/command bits affect the current conversion, which is the conversion that immediately follows

the current I/O cycle. They also have access to CFGR1 except for command 1111b, which is reserved.

8.4.8 Data Output Length

CFGR1 bits (D3 and D2) of the data register select the output data length. The data-length selection is valid for

the current I/O cycle (the cycle in which the data is read). The data-length selection, being valid for the current

I/O cycle, allows device start-up without losing I/O synchronization. A data length of 8, 12, or 16 bits can be

selected. Because the converter has 12-bit resolution, a data length of 12 bits is suggested.

With D3 and D2 set to 00 or 10, the device is in the 12-bit data-length mode and the result of the current

conversion is output as a 12-bit serial data stream during the next I/O cycle. The current I/O cycle must be

exactly 12 bits long for proper synchronization, even when this means corrupting the output data from a previous

conversion. The current conversion is started immediately after the twelfth falling edge of the current I/O cycle.

With bits D3 and D2 set to 11, the 16-bit data-length mode is selected, which allows convenient communication

with 16-bit serial interfaces. In the 16-bit mode, the result of the current conversion is output as a 16-bit serial

data stream during the next I/O cycle with the four LSBs always reset to 0 (pad bits). The current I/O cycle must

be exactly 16 bits long to maintain synchronization even when this means corrupting the output data from the

previous conversion. The current conversion is started immediately after the sixteenth falling edge of the current

I/O cycle.

With bits D3 and D2 set to 01, the 8-bit data-length mode is selected, which allows fast communication with 8-bit

serial interfaces. In the 8-bit mode, the result of the current conversion is output as an 8-bit serial data stream

during the next I/O cycle. The current I/O cycle must be exactly eight bits long to maintain synchronization, even

when this means corrupting the output data from the previous conversion. The four LSBs of the conversion result

are truncated and discarded. The current conversion is started immediately after the eighth falling edge of the

current I/O cycle.

Because the D3 and D2 register settings take effect on the I/O cycle when the data length is programmed, there

can be a conflict with the previous cycle if the data-word length was changed. This may occur when the data

format is selected to be least significant bit first, because at the time the data length change becomes effective

(six rising edges of I/O CLOCK), the previous conversion result has already started shifting out. In actual

operation, when different data lengths are required within an application and the data length is changed between

two conversions, no more than one conversion result can be corrupted and only when it is shifted out in LSB-first

format.

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