TLV2553

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SLAS354C – SEPTEMBER 2001 – REVISED SEPTEMBER 2015

6.6 External Reference Specifications

PARAMETER

TEST CONDITIONS

MIN

MAX

UNIT

–0.1

0

0.1

REF–

Reference input voltage

V

–0.1

0

0.1

2

REF+

Reference input voltage

V

2

1.9

External reference input voltage difference,

V

1.9

0.94

External reference supply current

CS at 0 V

mA

0.62

Static

1

M

Ω

During

6

9

k

Ω

sampling/conversion

Reference input impedance

Static

1

M

Ω

During

6

9

k

Ω

sampling/conversion

(1)

(2)

Add a 0.1-µF capacitor between REF+ and REF– pins when external reference is used.

6.7 Operating Characteristics

PARAMETER

TEST CONDITIONS

MAX

UNIT

INL

–1

1

LSB

DNL

Differential linearity error

–1

1

LSB

–2

2

mV

–3

3

mV

±15

LSB

Address data input = 1011

2048

Self-test output code Table 2, (6)

Address data input = 1100

0

Address data input = 1101

4095

(1)

(2)

Linearity error is the maximum deviation from the best straight line through the A/D transfer characteristics.

(3)

Gain error is the difference between the actual midstep value and the nominal midstep value in the transfer diagram at the specified gain

point after the offset error has been adjusted to zero. Offset error is the difference between the actual midstep value and the nominal

midstep value at the offset point.

(4)

Analog input voltages greater than the voltage applied to REF+ convert as all ones (111111111111), while input voltages less than the

voltage applied to REF– convert as all zeros (000000000000).

(5)

Total unadjusted error comprises linearity, zero-scale, and full-scale errors.

(6)

Both the input address and the output codes are expressed in positive logic.

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