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STM32F479AI 数据表(PDF) 173 Page - STMicroelectronics |
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STM32F479AI 数据表(HTML) 173 Page - STMicroelectronics |
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173 / 208 page  DocID028010 Rev 2 173/208 STM32F479xx Electrical characteristics 187 Figure 63. Synchronous non-multiplexed NOR/PSRAM read timings Table 99. Synchronous non-multiplexed NOR/PSRAM read timings(1) 1. Based on test during characterization. Symbol Parameter Min Max Unit tw(CLK) FMC_CLK period 2THCLK − 1 - ns t(CLKL-NExL) FMC_CLK low to FMC_NEx low (x=0…2) - 0.5 td(CLKH-NExH) FMC_CLK high to FMC_NEx high (x= 0…2) THCLK - td(CLKL-NADVL) FMC_CLK low to FMC_NADV low - 0 td(CLKL-NADVH) FMC_CLK low to FMC_NADV high 0 - td(CLKL-AV) FMC_CLK low to FMC_Ax valid (x=16…25) - 0 td(CLKH-AIV) FMC_CLK high to FMC_Ax invalid (x=16…25) THCLK − 0.5 - td(CLKL-NOEL) FMC_CLK low to FMC_NOE low - THCLK+2 td(CLKH-NOEH) FMC_CLK high to FMC_NOE high THCLK − 0.5 - tsu(DV-CLKH) FMC_D[15:0] valid data before FMC_CLK high 5 - th(CLKH-DV) FMC_D[15:0] valid data after FMC_CLK high 0 - t(NWAIT-CLKH) FMC_NWAIT valid before FMC_CLK high 4 - th(CLKH-NWAIT) FMC_NWAIT valid after FMC_CLK high 0 - |
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