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数据搜索系统，热门电子元器件搜索 |
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STM32F479AI 数据表(PDF) 175 Page - STMicroelectronics |
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STM32F479AI 数据表(HTML) 175 Page - STMicroelectronics |
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175 / 208 page  DocID028010 Rev 2 175/208 STM32F479xx Electrical characteristics 187 NAND controller waveforms and timings Figures 65 through 68 represent synchronous waveforms, and Table 101 and Table 102 provide the corresponding timings. The results shown in this table are obtained with the following FMC configuration: • COM.FMC_SetupTime = 0x01; • COM.FMC_WaitSetupTime = 0x03; • COM.FMC_HoldSetupTime = 0x02; • COM.FMC_HiZSetupTime = 0x01; • ATT.FMC_SetupTime = 0x01; • ATT.FMC_WaitSetupTime = 0x03; • ATT.FMC_HoldSetupTime = 0x02; • ATT.FMC_HiZSetupTime = 0x01; • Bank = FMC_Bank_NAND; • MemoryDataWidth = FMC_MemoryDataWidth_16b; • ECC = FMC_ECC_Enable; • ECCPageSize = FMC_ECCPageSize_512Bytes; • TCLRSetupTime = 0; • TARSetupTime = 0; • Capacitive load CL = 30 pF. In all timing tables, the THCLK is the HCLK clock period. Figure 65. NAND controller waveforms for read access |
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