ISL8117

4

FN8666.3

June 4, 2015

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6

4

RT

A resistor from this pin to ground adjusts the switching frequency from 100kHz to 2MHz. The switching

When this pin is tied to ground, the output frequency is set to 300kHz.

When this pin is tied to VCC5V or floating, the output frequency is set to 600kHz.

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5

SS/TRK

Dual function pin. When used for soft-starting control, a soft-start capacitor is connected from this pin to

ground. A regulated 2μA soft-starting current charges up the soft-start capacitor. Value of the soft-start

capacitor sets the output voltage ramp.

When used for tracking control, an external supply rail is configured as the master and the output voltage of

the master supply is applied to this pin via a resistor divider. The output voltage will track the master supply

voltage.

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6

FB

Output feedback input. Connect FB to a resistive voltage divider from the output to SGND to adjust the output

voltage.

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7

PGND

Power ground connection. This pin should be connected to the sources of the lower MOSFETs and the (-)

terminals of the external input capacitors.

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8

LGATE/OCS Low-side MOSFET gate driver output and OC set pin. Connect a 1k to 30k resistor between this pin and ground

to set the overcurrent threshold. If there is no resistor connected from this pin to GND, the overcurrent

threshold is automatically set to the same point as a 10k resistor does.

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9

VCC5V

Output of the internal 5V linear regulator. This output supplies bias for the IC, the low-side gate driver and the

internal boot circuitry for the high-side gate driver. The VCC5V pin must always be decoupled to power ground

with a minimum of 4.7µF ceramic capacitor placed very close to the pin. Do not allow the voltage at VCC5V

to exceed VIN at any time. To prevent excessive current through the VCC5V pin to the VIN pin, a resistor can

be connected from the VIN pin to the power supply.

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10

ISEN

Current sense signal input. This pin is used to monitor the voltage drop across the lower MOSFET for current

loop feedback and overcurrent protection.

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11

PHASE

Phase node connection. This pin is connected to the junction of the upper MOSFET’s source, output filter

inductor and lower MOSFET’s drain.

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12

UGATE

High-side MOSFET gate driver output.

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13

BOOT

Bootstrap pin to provide bias for high-side driver. The positive terminal of the bootstrap capacitor connects to

this pin. The bootstrap diode is integrated to help reduce total cost and reduce layout complexity.

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14

VIN

This pin should be tied to the input rail. It provides power to the internal linear drive circuitry and is also used

by the feed-forward controller to adjust the amplitude of the PWM sawtooth. Decouple this pin with a small

ceramic capacitor (0.1µF to 1µF) to ground.

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15

EXTBIAS

Input from an optional external 5V bias supply. There is an internal switch from this pin to VCC5V. This switch

closes and supplies the IC power, bypassing the internal linear regulator, when voltage at EXTBIAS is higher

than 4.7V (typ). Do not allow voltage at the EXTBIAS pin to exceed VIN at any time. To prevent excessive

current through the EXTBIAS pin to the VIN pin, a resistor can be connected from the VIN pin to the power

supply.

Decouple this pin to ground with a small ceramic capacitor (0.1µF to 1µF) when it is in use, otherwise tie this

pin to ground. DO NOT float this pin.

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16

EN

This pin provides an enable/disable function. The output is disabled when the pin is pulled to ground. When

the voltage on the pin reaches 1.6V, the output becomes active. When the pin is floating, it will be enabled in

default by internal pull-up.

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SGND

EPAD

This is the small-signal ground common to all control circuitry. It is suggested to route this separately from

the high current ground (PGND). SGND and PGND can be tied together if there is one solid ground plane with

no noisy currents around the chip. All voltage levels are measured with respect to this pin.

EPAD at ground potential. EPAD is connected to SGND internally. However, it is highly recommended to solder

it directly to ground plane for better thermal performance and noise immunity.

PIN #

(HTSSOP)

PIN #

(QFN)

PIN

NAME

FUNCTION

39.2

----------- 1.96

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(EQ. 1)