 |
数据搜索系统，热门电子元器件搜索 |
|
|
数据搜索系统，热门电子元器件搜索 |
|
SWCS049B 数据表(PDF) 61 Page - Texas Instruments |
|
|
|||||||||||||||||||||||||||||
SWCS049B 数据表(HTML) 61 Page - Texas Instruments |
|
|
61 / 119 page  61 TPS659110, TPS659112, TPS659113 TPS659114, TPS659118, TPS6591133 www.ti.com SWCS049Q – JUNE 2010 – REVISED MARCH 2016 Submit Documentation Feedback Product Folder Links: TPS659110 TPS659112 TPS659113 TPS659114 TPS659118 TPS6591133 Detailed Description Copyright © 2010–2016, Texas Instruments Incorporated Table 6-5. Interrupt Sources (continued) Interrupt Description HOT_DIE_IT The embedded thermal monitoring module has detected a die temperature above the hot-die detection threshold (running in ACTIVE and SLEEP state). Level sensitive interrupt. PWRHOLD_R_IT PWRHOLD signal rising edge PWRHOLD_F_IT PWRHOLD signal falling-edge PWRON_LP_IT PWRON is low during more than the long-press delay: PWON_TO_OFF_DELAY (can be disabled though register programming). PWRON_IT PWRON is low while the device is on (running in ACTIVE and SLEEP state). Level-sensitive interrupt. VMBHI_IT The battery voltage rise above the VMBHI threshold: NO SUPPLY-to-OFF or BACKUP-to- OFF device states transition (first battery plug or battery voltage bounce detection) VMBDCH_IT The battery voltage fall down below the VMBDCH threshold: the minimum operating voltage of power supplies. GPIO0_R_IT GPIO_CKSYNC rising-edge detection GPIO0_F_IT GPIO_CKSYNC falling-edge detection VMBCH2_H_IT Comparator 2 input above threshold detection VMBCH2_L_IT Comparator 2 input below threshold detection GPIO1_R_IT GPIO1 rising-edge detection GPIO1_F_IT GPIO1 falling-edge detection GPIO2_R_IT GPIO2 rising-edge detection GPIO2_F_IT GPIO2 falling-edge detection GPIO3_R_IT GPIO3 rising-edge detection GPIO3_F_IT GPIO3 falling-edge detection GPIO4_R_IT GPIO4 rising-edge detection GPIO4_F_IT GPIO4 falling-edge detection GPIO5_R_IT GPIO5 rising-edge detection GPIO5_F_IT GPIO5 falling-edge detection WTCHDG_IT Watchdog interrupt PWRDN_IT PWRDN reset interrupt 6.13 Functional Registers The possible device reset domains are: • Full reset: All digital logic of device is reset. – Caused by POR (power on reset) when VCC7 < VBNPR and BB < VBNPR • General reset: No impact on RTC, backup registers or interrupt status. – Caused by PWON_LP_RST bit set high or – DEV_OFF_RST bit set high or – HDRST input set high • Turnoff OFF: Power reinitialization in off/backup mode. In the following register description, reset domain for each register is defined at the register table heading. NOTE DCDCCTRL_REG and DEVCTRL2_REG have bits in two reset domains. Comment “Default value: See boot configuration” indicates that bit default value is set in boot configuration and not by register Reset value.” |
|
链接网址 |
| ALLDATASHEET是否为您带来帮助? [ DONATE ] |
关于 Alldatasheet | 广告服务 | 联系我们 | 隐私政策 | 数据表链接 | 链接交换 | 制造商名单 All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |
Chinese ▼
English
Chinese
German
Japanese
Russian
Korean
Spanish
French
Italian
Portuguese
Polish
Vietnamese
Indian
Mexican
British
New Zealand
