YMF754-R datasheet(26/60 Pages) YAMAHA

26 / 60 page

YMF754

June 28, 1999

-26-

b11..............PSIO: Power Save I/O Pad

Setting this bit to “1” cuts the pull up resistor of the input pins except for the PCI interface and AC-Link.

The input signals keep the level before PSIO bit is set from “0” to “1”.

In case the input level is only

“low”, the pull up resistor is cut.

“0”: Normal

(default)

“1”: Cuts the pull up resistor

b12..............PSHWV: Power Save Hardware Volume

Setting this bit to “1” stops a clock supplied to the Hardware Volume block.

“0”: Normal

(default)

“1”: Disable

PCI

Clock

(33MHz)

PCI I/F

PC/PCI

D-DMA

S-IRQ

EEPROM I/F

I/O Pad

PSIO

External Input

Master

Clock

(24.576MHz)

PLL

DMC

DPLL

FM Synthesizer

SB Pro

AC-link

ZVport

H/W Vol.

PCI Audio

SRC

SPDIF OUT

SPDIF IN

AC97 Master Clock

MPU401

Joystick

CMCD

PSFM

PSSB

PSMPU

PSJOY

PSPCA

PSSRC

PSZV

PSDIT

PSDIR

PSACL

PSHWV

Power Management Block

YMF754-R 数据表(PDF) 26 Page - YAMAHA CORPORATION

YMF754-R 数据表(HTML) 26 Page - YAMAHA CORPORATION

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