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YMF754-R 数据表(PDF) 5 Page - YAMAHA CORPORATION

部件名 YMF754-R
功能描述  DS-1E
PDF  60 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
制造商  YAMAHA [YAMAHA CORPORATION]
网页  http://www.yamaha.com
标志 YAMAHA - YAMAHA CORPORATION

YMF754-R 数据表(HTML) 5 Page - YAMAHA CORPORATION

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YMF754
June 28, 1999
-5-
PIN DESCRIPTION
1. PCI Bus Interface (54-pin)
Name
I/O
Type
Size
Function
PCICLK
I
P
-
PCI Clock
RST#
I
P
-
Reset
AD[31:0]
IO
Ptr
-
Address / Data
C/BE[3:0]#
IO
Ptr
-
Command / Byte Enable
PAR
IO
Ptr
-
Parity
FRAME#
IO
Pstr
-
Frame
IRDY#
IO
Pstr
-
Initiator Ready
TRDY#
IO
Pstr
-
Target Ready
STOP#
IO
Pstr
-
Stop
IDSEL
I
P
-
ID Select
DEVSEL#
IO
Pstr
-
Device Select
REQ#
O
P
-
PCI Bus Master Request
GNT#
I
P
-
PCI Bus Master Grant
PCREQ#
O
Ptr
-
PC/PCI Request
PCGNT#
I
Ptr
-
PC/PCI Grant
PERR#
IO
Pstr
-
Parity Error
SERR#
O
Pod
-
System Error
INTA#
O
Pod
-
Interrupt signal output for PCI Bus
SERIRQ#
IO
Ptr
-
Serialized IRQ
CLKRUN#
IO
Ptr
-
Clock Run
2. AC’97 Interface (8-pin)
Name
I/O
Type
Size
Function
CRST#
O
T
6mA
Reset signal for AC’97
CMCLK
O
C
-
Master Clock for AC’97 (24.576MHz)
CBCLK
I
T
-
AC-link: Bit Clock for AC’97 audio data
CSDO
O
T
6mA
AC-link: AC’97 Serial audio output data
CSYNC
O
T
6mA
AC-link: AC’97 Synchronized signal
CSDI0
I
T
-
AC-link: AC’97 Serial audio input data (Primary)
CSDI1
I
Tup
-
AC-link: AC’97 Serial audio input data (Secondary)
DOCKEN#
I
Tup
-
Secondary AC’97 Enable



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