LP3907TL-PLNTOSLASHNOPB datasheet(37/58 Pages) TI1

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2 MHz

Time

Spread Spectrum

frequency

10 kHz triangle

wave

Peak frequency deviation

2 kHz triangle

wave

LP3907

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SNVS511S – JUNE 2007 – REVISED APRIL 2016

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8.6.1.12 Buck2 Ramp Control Register (B2RC) - 0x2B

This register allows the user to program the rate of change between the target voltages of Buck2.

D6-D4

D3-D0

Name

- - - -

B2RS

Access

- - - -

R/W

Data

Reserved

Data Code

Ramp Rate mV/us

4h'0

Instant

4h'1

4h'2

4h'3

4h'4

4h'5

4h'6

4h'7

4h'8

4h'9

4h'A

4h'B - 4h'F

Reset

010

1000

8.6.1.13 Buck Function Register (BFCR) – 0x38

This register allows the Buck switcher clock frequency to be spread across a wider range, allowing for less

Electro-magnetic Interference (EMI). The spread spectrum modulation frequency refers to the rate at which the

frequency ramps up and down, centered at 2 MHz.

Figure 44. Spread Spectrum Modulation Frequency

This register also allows dynamic scaling of the nPOR Delay Timing. The LP3907 is equipped with an internal

POR circuit which monitors the output voltage levels on the buck regulators, allowing the user to more actively

monitor the power status of the chip.

The UVLO feature continuously monitor the raw input supply voltage (VINLDO12) and automatically disables the

four voltage regulators whenever this supply voltage is less than 2.8 VDC. This prevents the user from damaging

the power source (such as battery), but can be disabled if the user wishes.

Note that if the supply to VDD_M is close to 2.8 V with a heavy load current on the regulators, the chip is in

danger of powering down due to UVLO. If the user wishes to keep the chip active under those conditions, enable

the Bypass UVLO feature.

LP3907TL-PLNTO/NOPB 数据表(PDF) 37 Page - Texas Instruments

LP3907TL-PLNTO/NOPB 数据表(HTML) 37 Page - Texas Instruments

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