LP3907TL-PLNTOSLASHNOPB datasheet(42/58 Pages) TI1

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LP3907

SNVS511S – JUNE 2007 – REVISED APRIL 2016

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9.2.2.2 LDO Capacitor Selection

9.2.2.2.1

Input Capacitor

An input capacitor is required for stability. It is recommended that a 1-

μF capacitor be connected between the

LDO input pin and ground (this capacitance value may be increased without limit).

This capacitor must be located a distance of not more than 1 cm from the input pin and returned to a clean

analog ground. Any good quality ceramic, tantalum, or film capacitor may be used at the input.

Important: Tantalum capacitors can suffer catastrophic failures due to surge currents when connected to a low

impedance source of power (such as a battery or a very large capacitor). If a tantalum capacitor is used at the

input, it must be ensured by the manufacturer to have a surge current rating sufficient for the application.

There are no requirements for the equivalent series resistance (ESR) on the input capacitor, but tolerance and

temperature coefficient must be considered when selecting the capacitor to ensure the capacitance remains

approximately 1

μF over the entire operating temperature range.

9.2.2.2.2

Output Capacitor

The LDOs on the LP3907 are designed specifically to work with very small ceramic output capacitors. A 0.47-µF

ceramic capacitor (temperature types Z5U, Y5V or X7R) with ESR between 5 m

Ω to 500 mΩ, is suitable in the

application circuit.

It is also possible to use tantalum or film capacitors at the device output, COUT (or VOUT), but these are not as

attractive for reasons of size and cost.

The output capacitor must meet the requirement for the minimum value of capacitance and also have an ESR

value that is within the range 5 m

Ω to 500 mΩ for stability.

9.2.2.2.3

Capacitor Characteristics

The LDOs are designed to work with ceramic capacitors on the output to take advantage of the benefits they

offer. For capacitance values in the range of 0.47 µF to 4.7 µF, ceramic capacitors are the smallest, least

expensive and have the lowest ESR values, thus making them best for eliminating high frequency noise. The

ESR of a typical 1-µF ceramic capacitor is in the range of 20 m

Ω to 40 mΩ, which easily meets the ESR

requirement for stability for the LDOs.

For both input and output capacitors, careful interpretation of the capacitor specification is required to ensure

correct device operation. The capacitor value can change greatly, depending on the operating conditions and

capacitor type.

In particular, the output capacitor selection should take account of all the capacitor parameters, to ensure that the

specification is met within the application. The capacitance can vary with DC bias conditions as well as

temperature and frequency of operation. Capacitor values will also show some decrease over time due to aging.

The capacitor parameters are also dependent on the particular case size, with smaller sizes giving poorer

performance figures in general. As an example, Figure 46 is a typical graph comparing different capacitor case

sizes.

LP3907TL-PLNTO/NOPB 数据表(PDF) 42 Page - Texas Instruments

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