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MCP23017-E/ML 数据表(PDF) 13 Page - Microchip Technology |
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MCP23017-E/ML 数据表(HTML) 13 Page - Microchip Technology |
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13 / 42 page ![]() 2005-2016 Microchip Technology Inc. DS20001952C-page 13 MCP23017/MCP23S17 3.2.1 BYTE MODE AND SEQUENTIAL MODE The MCP23X17 family has the ability to operate in Byte mode or Sequential mode (IOCON.SEQOP). Byte mode disables automatic Address Pointer incrementing. When operating in Byte mode, the MCP23X17 family does not increment its internal address counter after each byte during the data transfer. This gives the ability to continually access the same address by providing extra clocks (without additional control bytes). This is useful for polling the GPIO register for data changes or for continually writing to the output latches. A special mode (Byte mode with IOCON.BANK = 0) causes the address pointer to toggle between associated A/B register pairs. For example, if the BANK bit is cleared and the Address Pointer is initially set to address 12h (GPIOA) or 13h (GPIOB), the pointer will toggle between GPIOA and GPIOB. Note that the Address Pointer can initially point to either address in the register pair. Sequential mode enables automatic address pointer incrementing. When operating in Sequential mode, the MCP23X17 family increments its address counter after each byte during the data transfer. The Address Pointer automatically rolls over to address 00h after accessing the last register. These two modes are not to be confused with single writes/reads and continuous writes/reads that are serial protocol sequences. For example, the device may be configured for Byte mode and the master may perform a continuous read. In this case, the MCP23X17 would not increment the Address Pointer and would repeatedly drive data from the same location. 3.2.2 I2C INTERFACE 3.2.2.1 I2C Write Operation The I2C write operation includes the control byte and register address sequence, as shown in Figure 3-1. This sequence is followed by eight bits of data from the master and an Acknowledge (ACK) from the MCP23017. The operation is ended with a Stop (P) or Restart (SR) condition being generated by the master. Data is written to the MCP23017 after every byte transfer. If a Stop or Restart condition is generated during a data transfer, the data will not be written to the MCP23017. Both “byte writes” and “sequential writes” are supported by the MCP23017. If Sequential mode is enabled (IOCON, SEQOP = 0) (default), the MCP23017 increments its address counter after each ACK during the data transfer. FIGURE 3-1: BYTE AND SEQUENTIAL WRITE S P W OP ADDR DIN DIN .... S W OP ADDR DIN P Byte Sequential S P SR W R OP ADDR DIN - Start - Restart - Stop - Write - Read - Device opcode - Device register address - Data out from MCP23017 - Data in to MCP23017 DOUT |
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