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MCP23017-E/ML 数据表(PDF) 17 Page - Microchip Technology

部件名 MCP23017-E/ML
功能描述  16-Bit I/O Expander with Serial Interface
PDF  42 Pages
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制造商  MICROCHIP [Microchip Technology]
网页  http://www.microchip.com
标志 MICROCHIP - Microchip Technology

MCP23017-E/ML 数据表(HTML) 17 Page - Microchip Technology

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 2005-2016 Microchip Technology Inc.
DS20001952C-page 17
MCP23017/MCP23S17
3.5
Configuration and Control
Registers
There are 21 registers associated with the MCP23X17,
as shown in Tables 3-4 and3-5. The two tables show
the register mapping with the two BANK bit values. Ten
registers are associated with PORTA and ten are
associated with PORTB. One register (IOCON) is
shared between the two ports. The PORTA registers
are identical to the PORTB registers, therefore, they
will be referred to without differentiating between the
port designation (i.e., they will not have the “A” or “B”
designator assigned) in the register tables.
TABLE 3-4:
CONTROL REGISTER SUMMARY (IOCON.BANK = 1)
Register
Name
Address
(hex)
bit 7bit 6bit 5
bit 4bit 3bit 2bit 1
bit 0
POR/RST
value
IODIRA
00
IO7
IO6
IO5
IO4
IO3
IO2
IO1
IO0
1111 1111
IPOLA
01IP7
IP6IP5
IP4IP3
IP2IP1
IP0
0000 0000
GPINTENA
02
GPINT7
GPINT6
GPINT5
GPINT4
GPINT3
GPINT2
GPINT1
GPINT0
0000 0000
DEFVALA
03
DEF7DEF6
DEF5DEF4DEF3DEF2DEF1DEF0
0000 0000
INTCONA
04
IOC7
IOC6
IOC5
IOC4
IOC3
IOC2
IOC1
IOC0
0000 0000
IOCON
05
BANK
MIRROR
SEQOP
DISSLW
HAEN
ODR
INTPOL
—
0000 0000
GPPUA
06
PU7
PU6
PU5
PU4
PU3
PU2
PU1
PU0
0000 0000
INTFA
07
INT7
INT6
INT5
INT4
INT3
INT2
INT1
INTO
0000 0000
INTCAPA
08
ICP7
ICP6
ICP5
ICP4
ICP3
ICP2
ICP1
ICP0
0000 0000
GPIOA
09
GP7
GP6
GP5
GP4
GP3
GP2
GP1
GP0
0000 0000
OLATA
0A
OL7
OL6
OL5
OL4
OL3
OL2
OL1
OL0
0000 0000
IODIRB
10
IO7
IO6
IO5
IO4
IO3
IO2
IO1
IO0
1111 1111
IPOLB
11
IP7
IP6
IP5
IP4
IP3
IP2
IP1
IP0
0000 0000
GPINTENB
12
GPINT7
GPINT6
GPINT5
GPINT4
GPINT3
GPINT2
GPINT1
GPINT0
0000 0000
DEFVALB
13
DEF7
DEF6
DEF5
DEF4
DEF3
DEF2
DEF1
DEF0
0000 0000
INTCONB
14
IOC7
IOC6
IOC5
IOC4
IOC3
IOC2
IOC1
IOC0
0000 0000
IOCON
15
BANK
MIRROR
SEQOP
DISSLW
HAEN
ODR
INTPOL
—
0000 0000
GPPUB
16
PU7
PU6
PU5
PU4
PU3
PU2
PU1
PU0
0000 0000
INTFB
17
INT7
INT6
INT5
INT4
INT3
INT2
INT1
INTO
0000 0000
INTCAPB
18
ICP7
ICP6
ICP5
ICP4
ICP3
ICP2
ICP1
ICP0
0000 0000
GPIOB
19
GP7
GP6
GP5
GP4
GP3
GP2
GP1
GP0
0000 0000
OLATB
1A
OL7
OL6
OL5
OL4
OL3
OL2
OL1
OL0
0000 0000
TABLE 3-5:
CONTROL REGISTER SUMMARY (IOCON.BANK = 0)
Register
Name
Address
(hex)
bit 7bit 6bit 5
bit 4bit 3bit 2bit 1
bit 0
POR/RST
value
IODIRA
00
IO7
IO6
IO5
IO4
IO3
IO2
IO1
IO0
1111 1111
IODIRB
01
IO7
IO6
IO5
IO4
IO3
IO2
IO1
IO0
1111 1111
IPOLA
02IP7
IP6IP5
IP4IP3
IP2IP1
IP0
0000 0000
IPOLB
03
IP7
IP6
IP5
IP4
IP3
IP2
IP1
IP0
0000 0000
GPINTENA
04
GPINT7
GPINT6
GPINT5
GPINT4
GPINT3
GPINT2
GPINT1
GPINT0
0000 0000
GPINTENB
05
GPINT7
GPINT6
GPINT5
GPINT4
GPINT3
GPINT2
GPINT1
GPINT0
0000 0000
DEFVALA
06
DEF7DEF6
DEF5DEF4DEF3DEF2DEF1DEF0
0000 0000
DEFVALB
07
DEF7
DEF6
DEF5
DEF4
DEF3
DEF2
DEF1
DEF0
0000 0000
INTCONA
08
IOC7
IOC6
IOC5
IOC4
IOC3
IOC2
IOC1
IOC0
0000 0000
INTCONB
09
IOC7
IOC6
IOC5
IOC4
IOC3
IOC2
IOC1
IOC0
0000 0000
IOCON
0A
BANK
MIRROR
SEQOP
DISSLW
HAEN
ODR
INTPOL
—
0000 0000
IOCON
0B
BANK
MIRROR
SEQOP
DISSLW
HAEN
ODR
INTPOL
—
0000 0000
GPPUA
0C
PU7
PU6
PU5
PU4
PU3
PU2
PU1
PU0
0000 0000
GPPUB
0D
PU7
PU6
PU5
PU4
PU3
PU2
PU1
PU0
0000 0000



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