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MCP23017-E/ML 数据表(PDF) 18 Page - Microchip Technology

部件名 MCP23017-E/ML
功能描述  16-Bit I/O Expander with Serial Interface
PDF  42 Pages
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制造商  MICROCHIP [Microchip Technology]
网页  http://www.microchip.com
标志 MICROCHIP - Microchip Technology

MCP23017-E/ML 数据表(HTML) 18 Page - Microchip Technology

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MCP23017/MCP23S17
DS20001952C-page 18
 2005-2016 Microchip Technology Inc.
3.5.1
I/O DIRECTION REGISTER
Controls the direction of the data I/O.
When a bit is set, the corresponding pin becomes an
input. When a bit is clear, the corresponding pin
becomes an output.
3.5.2
INPUT POLARITY REGISTER
This register allows the user to configure the polarity on
the corresponding GPIO port bits.
If a bit is set, the corresponding GPIO register bit will
reflect the inverted value on the pin.
INTFA
0E
INT7
INT6
INT5
INT4
INT3
INT2
INT1
INTO
0000 0000
INTFB
0F
INT7
INT6
INT5
INT4
INT3
INT2
INT1
INTO
0000 0000
INTCAPA
10
ICP7
ICP6
ICP5
ICP4
ICP3
ICP2
ICP1
ICP0
0000 0000
INTCAPB
11
ICP7
ICP6
ICP5
ICP4
ICP3
ICP2
ICP1
ICP0
0000 0000
GPIOA
12
GP7
GP6
GP5
GP4
GP3
GP2
GP1
GP0
0000 0000
GPIOB
13
GP7
GP6
GP5
GP4
GP3
GP2
GP1
GP0
0000 0000
OLATA
14
OL7
OL6
OL5
OL4
OL3
OL2
OL1
OL0
0000 0000
OLATB
15
OL7
OL6
OL5
OL4
OL3
OL2
OL1
OL0
0000 0000
TABLE 3-5:
CONTROL REGISTER SUMMARY (IOCON.BANK = 0) (CONTINUED)
Register
Name
Address
(hex)
bit 7bit 6bit 5
bit 4bit 3bit 2bit 1
bit 0
POR/RST
value
REGISTER 3-1:
IODIR: I/O DIRECTION REGISTER (ADDR 0x00)
R/W-1
R/W-1
R/W-1
R/W-1
R/W-1
R/W-1
R/W-1
R/W-1
IO7
IO6
IO5
IO4
IO3
IO2
IO1
IO0
bit 7
bit 0
Legend:
R = Readable bit
W = Writable bit
U = Unimplemented bit, read as ‘0’
-n = Value at POR
‘1’ = Bit is set
‘0’ = Bit is cleared
x = Bit is unknown
bit 7-0
IO<7:0>: Controls the direction of data I/O <7:0>
1
= Pin is configured as an input.
0
= Pin is configured as an output.
REGISTER 3-2:
IPOL: INPUT POLARITY PORT REGISTER (ADDR 0x01)
R/W-0
R/W-0
R/W-0
R/W-0
R/W-0
R/W-0
R/W-0
R/W-0
IP7
IP6
IP5
IP4
IP3
IP2
IP1
IP0
bit 7
bit 0
Legend:
R = Readable bit
W = Writable bit
U = Unimplemented bit, read as ‘0’
-n = Value at POR
‘1’ = Bit is set
‘0’ = Bit is cleared
x = Bit is unknown
bit 7-0
IP<7:0>: Controls the polarity inversion of the input pins <7:0>
1
= GPIO register bit reflects the opposite logic state of the input pin.
0
= GPIO register bit reflects the same logic state of the input pin.



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