LMX2430 datasheet(4/49 Pages) NSC

4 / 49 page

Pin Descriptions (Continued)

Pin No.

UTCSP

Pin No.

TSSOP

Pin Name

I/O

Description

FLoutRF

RF PLL Fastlock output. This pin connects a resistor in parallel to R2 of the

external loop filter. This pin can also function as a general purpose CMOS

TRI-STATE output.

GND

—

Ground for the RF PLL digital circuits.

CPoutRF

RF PLL charge pump output. The output is connected to the external loop filter,

which drives the input of the RF VCO.

GND

—

Ground for the RF PLL analog circuits.

FinRF

RF PLL prescaler input. Small signal input from the VCO.

FinRF*

RF PLL prescaler complementary input. For single ended operation, this pin

should be AC grounded through a 100 pF capacitor. The LMX243x can be

driven differentially when the AC coupled capacitor is omitted.

Vcc

—

Power supply bias for the RF PLL analog circuits. Vcc may range from 2.25V to

2.75V. Bypass capacitors should be placed as close as possible to this pin and

be connected directly to the ground plane.

MICROWIRE Latch Enable input. High impedance CMOS input. When LE

transitions HIGH, DATA stored in the shift register is loaded into one of 6

internal control registers.

CLK

MICROWIRE Clock input. High impedance CMOS input. DATA is clocked into

the 24-bit shift register on the rising edge of CLK.

DATA

MICROWIRE Data input. High impedance CMOS input. Binary serial data. The

MSB of DATA is shifted in first. The two last bits are the control bits.

Vcc

—

Power supply bias for the IF PLL analog and digital circuits, MICROWIRE, and

Ftest/LD circuits. Vcc may range from 2.25V to 2.75V. Bypass capacitors

should be placed as close as possible to this pin and be connected directly to

the ground plane

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