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AP0101CS 数据表(PDF) 27 Page - ON Semiconductor

部件名 AP0101CS
功能描述  High-Dynamic Range (HDR) Image Signal Processor (ISP)
PDF  42 Pages
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制造商  ONSEMI [ON Semiconductor]
网页  http://www.onsemi.com
标志 ONSEMI - ON Semiconductor

AP0101CS 数据表(HTML) 27 Page - ON Semiconductor

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AP0101CS/D Rev. 7, 1/16 EN
27
©Semiconductor Components Industries, LLC,2016.
AP0101CS HDR: Image Signal Processor (ISP)
Output Formatting
SMPTE Output
The data ordering for the SMPTE output mode for AP0101AT is shown in Table 14:
Figure 15:
SMPTE296M Output
Table 14:
SMPTE Output Mode
Mode
Byte
Pixel i
Pixel i+1
Notes
SMPTE
Single{Dout[15:8],GPIO[5:4]}-->Cb/Cr
{Dout[7:0],GPIO[3:2]} --->Y
Cbi_Yi
Cri_Yi+1
Data range of 4-1019 (Y=64-940 and C=64-
960)
Active Video
Cb
Cr
Cb
Cr
Cb
Cr
Cb
Cr
200
C b
C r
C b
C r
3F F 000 000 200
200
3F F 000 000 274
3F F 000 000 200
Cb
Cr
Cb
Cr
200
3F F 000 000 274
SAV
Im age
EAV
SAV
Im age
EAV
H Blank
H Blank
Blanking
Blanking
Blanking
HBlank
SAV
Im age
EAV
SAV Blank
VBlank
EAV blank
HBlank
H Blank
Blanking
Blanking
Blanking
HBlank
SAV Blank
VBlank
EAV Blank
SAV Blank
VBlank
EAV Blank
HBlank
H Blank
Blanking
Blanking
Blanking
HBlank
SAV Blank
VBlank
EAV Blank
SAV
Im age
EAV
HBlank
H Blank
Blanking
Blanking
Blanking
HBlank
Blanking
YYYY
Y
YYY
040
YYYY
3F F 000 000 200
040
3F F 000 000 274
3F F 000 000 200
YYYY
040
3F F 000 000 274
Y
Y
Y
Y
Y
Y
Y
Y
040
040
3FF 000 000 200
040
000 000 274
000 000
040
000 000 2D8
Cb Cr Cb Cr
Cb Cr Cb Cr
200
200
000 000 200
200
000 000 274
000 000
200
000 000
040
040
040
000 000
040
000 000
000 000
040
000 000
200
200
200
000 000
200
000 000
000 000 2AC
200
000 000
040
040
Y
Y
Y
Y
3F F 000 000 2AC
040
3F F 000 000 2D8
3F F 000 000 200
YYYY
040
3F F 000 000 274
200
200
Cb
Cr
Cb
Cr
3F F 000 000 2AC
200
3F F 000 000 2D8
3F F 000 000 200
Cb
Cr
Cb
Cr
200
3F F 000 000 274
Pix el C loc k
Data[7:0]
GPIO3, GPIO2
Data[15:8]
GPIO5, GPIO4
Pix el C loc k
Data[7:0]
GPIO3, GPIO2
Data[15:8]
GPIO5, GPIO4
Pix el C loc k
Data[7:0]
GPIO3, GPIO2
Data[15:8]
GPIO5, GPIO4
Pix el C loc k
Data[7:0]
GPIO3, GPIO2
Data[15:8]
GPIO5, GPIO4
3FF
3FF
3FF
3FF
3FF
3FF
3FF
2D8
2D8
2D8
2AC
2AC
2AC
3FF
3FF
3FF
3FF
3FF
3FF
3FF
3FF
2AC
2AC
2D8
2D8



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