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ADRF6720-27ACPZ-R7 数据表(PDF) 33 Page - Analog Devices |
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ADRF6720-27ACPZ-R7 数据表(HTML) 33 Page - Analog Devices |
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33 / 44 page  ADRF6720-27 Data Sheet Rev. B | Page 32 of 43 REGISTER MAP Table 14. ADRF6720-27 Register Map Reg Name Bits Bit 15 Bit 14 Bit 13 Bit 12 Bit 11 Bit 10 Bit 9 Bit 8 Reset RW Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 0x00 SOFT_RESET [15:8] RESERVED 0x0000 W [7:0] RESERVED SOFT_RESET 0x01 ENABLES [15:8] RESERVED LO_1XVCO_EN MOD_EN QUAD_DIV_EN LO_DRV2X_EN 0xF67F RW [7:0] LO_DRV1X_EN VCO_MUX_EN REF_BUF_EN VCO_EN DIV_EN CP_EN VCO_LDO_EN RESERVED 0x02 INT_DIV [15:8] RESERVED DIV_MODE INT_DIV[10:8] 0x002C RW [7:0] INT_DIV[7:0] 0x03 FRAC_DIV [15:8] FRAC_DIV[15:8] 0x0128 RW [7:0] FRAC_DIV[7:0] 0x04 MOD_DIV [15:8] MOD_DIV[15:8] 0x0600 RW [7:0] MOD_DIV[7:0] 0x10 ENBL_MASK [15:8] RESERVED LO_1XVCO_MASK MOD_MASK QUAD_DIV_MASK LO_DRV2X_MASK 0xF67F RW [7:0] LO_DRV1X_MASK VCO_MUX_MASK REF_BUF_MASK VCO_MASK DIV_MASK CP_MASK VCO_LDO_MASK RESERVED 0x20 CP_CTL [15:8] RESERVED CP_SEL CP_CSCALE RESERVED 0x0C26 RW [7:0] RESERVED CP_BLEED 0x21 PFD_CTL [15:8] RESERVED 0x000B RW [7:0] RESERVED REF_MUX_SEL PFD_POLARITY REF_SEL 0x22 VCO_CTL [15:8] VCO_LDO_R4SEL VCO_LDO_R2SEL 0x2A03 RW [7:0] LO_DRV_LVL DRVDIV2_EN DIV8_EN DIV4_EN VCO_SEL 0x30 BALUN_CTL [15:8] RESERVED 0x0000 RW [7:0] BAL_COUT BAL_CIN 0x31 MOD_LIN_CTL [15:8] RESERVED MOD_RSEL[6:2] 0x1101 RW [7:0] MOD_RSEL[1:0] MOD_CSEL 0x32 MOD_CTL0 [15:8] RESERVED MOD_BLEED POL_Q POL_I 0x0900 RW [7:0] Q_LO I_LO 0x33 MOD_CTL1 [15:8] DCOFF_I 0x0000 RW [7:0] DCOFF_Q 0x40 PFD_CP_CTL [15:8] RESERVED 0x0010 RW [7:0] RESERVED ABLDLY CP_CTRL PFD_CLK_EDGE 0x42 DITH_CTL1 [15:8] RESERVED 0x000E RW [7:0] RESERVED DITH_EN DITH_MAG DITH_VAL 0x43 DITH_CTL2 [15:8] DITH_VAL[15:8] 0x0000 RW [7:0] DITH_VAL[7:0] 0x45 VCO_CTL2 [15:8] RESERVED VTUNE_CTRL 0x0000 RW [7:0] VCO_BAND_SRC BAND 0x49 VCO_CTL3 [15:8] RESERVED SET_1 SET_0[8] 0x16BD RW [7:0] SET_0[7:0] |
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