ADRF6720-27ACPZ-R7 datasheet(22/44 Pages) AD

22 / 44 page

Data Sheet

ADRF6720-27

Rev. B | Page 21 of 43

BASEBAND

The baseband inputs are designed to work with a 2.68 V

common-mode voltage. To match the 100 Ω impedance of the

DAC, place a shunt 100 Ω external resistor across the I and Q

inputs.

The voltages applied to the differential baseband inputs (I+, I−,

Q+, and Q−) drive the V-to-I stage that converts baseband

voltages into currents. The converted modulated signal current

feeds the modulator mixer core.

A programmable dc current can be added to both the I and Q

channels to null any carrier feedthrough at the RF output. Refer

to the Carrier Feedthrough Nulling section for more

information

The linearity can be optimized by adding the amplitude and

phase correction signals to the current output via the MOD_RSEL

(Register 0x31[12:6]) and MOD_CSEL (Register 0x31[5:0])

adjustment. Refer to the Linearity section for more information.

ACTIVE MIXERS

The ADRF6720-27 has two double balanced mixers: one for the

in-phase channel (I channel) and the other for the quadrature

channel (Q channel). They upconvert the modulated baseband

signal currents by the LO signals to the RF.

Tunable RFOUT Balun

The ADRF6720-27 integrates a programmable balun operating

over a frequency range from 700 MHz to 3000 MHz. It offers

single-ended-to-differential conversion and provides additional

common-mode noise rejection.

The capacitors at the input and output of the balun in parallel

with the inductive windings of the balun change the resonant

frequency of the inductor capacitor (LC) tank. Therefore,

selecting the proper combination of BAL_CIN (Register 0x30[3:0])

and BAL_COUT (Register 0x30[7:4]) sets the desired frequency

and optimizes gain. Under most circumstances, it is suggested to

set BAL_CIN and BAL_COUT over the frequency profile given

in Table 12. However, for matching reasons, it is advantageous

to tune the registers independently.

Figure 43. Integrated Tunable Balun

Table 12. Optimum Balun Setting For Desired Frequency

Range

BAL_CIN

BAL_COUT

Frequency Range (MHz)

fRF > 1730

1550 < fRF < 1730

1380 < fRF < 1550

1250 < fRF < 1380

1170 < fRF < 1250

1100 < fRF < 1170

1020 < fRF < 1100

970 < fRF < 1020

930 < fRF < 970

890 < fRF < 930

840 < fRF < 890

820 < fRF < 840

780 < fRF < 820

730 < fRF < 780

680 < fRF < 730

630 < fRF < 680

fRF < 630

ENBL

The ENBL pin quickly enables/disables the RF output. The

circuit blocks that are enabled/disabled with the ENBL pin can

be programmed by setting the appropriate bits in the enables

(Register 0x10). When the bits in the enables and the

ENBL_MASK register are 1, pulling the ENBL pin low disables

and pulling high enables the internal blocks more quickly than

possible with an SPI write operation.

Table 13. Enable/Disable Settings

0x01

Enables

Bit1

ENBL_MASK

Bit1

ENBL Pin

Voltage

State

Block controlled

by Register 0x01

enables bit [A]

disabled. No effect

by ENBL.

Block controlled

by Register 0x01

enables bit [A]

enabled. No effect

by ENBL.

>1.8 V

Block controlled

by Register 0x01

enables bit [A]

enabled.

<0.5 V

Block controlled

by Register 0x01

enables bit [A]

disabled

This bit refers to any of the 11 bits in the register.

X = don’t care.

BAL_COUT

REG 0x30[7:4]

BAL_CIN

REG 0x30[3:0]

RFOUT

ADRF6720-27ACPZ-R7 数据表(PDF) 22 Page - Analog Devices

ADRF6720-27ACPZ-R7 数据表(HTML) 22 Page - Analog Devices

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44

数据表下载

链接网址

ADRF6720-27ACPZ-R7 数据表(PDF) 22 Page - Analog Devices

ADRF6720-27ACPZ-R7 数据表(HTML) 22 Page - Analog Devices

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44

数据表 下载

链接网址

数据表下载