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STM8AL3136 数据表(PDF) 34 Page - STMicroelectronics

部件名 STM8AL3136
功能描述  Automotive 8-bit ultra-low-power MCU, up to 32 Kbyte Flash, RTC, data EEPROM, LCD, timers, USART, I2C, SPI, ADC, DAC, COMPs
PDF  124 Pages
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制造商  STMICROELECTRONICS [STMicroelectronics]
网页  http://www.st.com
标志 STMICROELECTRONICS - STMicroelectronics

STM8AL3136 数据表(HTML) 34 Page - STMicroelectronics

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Pin description
STM8AL313x/4x/6x STM8AL3L4x/6x
34/124
DocID18474 Rev 7
Note:
The slope control of all GPIO pins, except true open drain pins, can be programmed. By
default, the slope control is limited to 2 MHz.
13
9
9 VLCD(2)
S-
-
-
-
-
-
-
LCD booster external capacitor
13
-
-
Reserved(8)
--
-
-
-
-
-
-
Reserved. Must be tied to VDD
10
-
-
VDD
S
-
-
-
-
-
-
- Digital power supply
11
-
-
VDDA
S
-
-
-
-
-
-
- Analog supply voltage
12
-
-
VREF+
S-
-
-
-
-
-
-
ADC1 and DAC positive voltage
reference
-8
8 VDD1/VDDA/VREF+
S-
-
-
-
-
-
-
Digital power supply / Analog
supply voltage / ADC1 positive
voltage reference
97
7 VSS1/VSSA/VREF-
S-
-
-
-
-
-
-
I/O ground / Analog ground
voltage / ADC1 negative voltage
reference
39
-
-
VDD2
S
-
-
-
-
-
-
- IOs supply voltage
40
-
-
VSS2
S
-
-
-
-
-
-
- IOs ground voltage
132
32
PA0(9)/[USART1_CK](4)/
SWIM/BEEP/IR_TIM (10)
I/O
-
X X(9) XHS(10) X
X Port A0
[USART1 synchro-
nous clock](4) / SWIM
input and output /
Beep output / Infrared
Timer output
1. At power-up, the PA1/NRST pin is a reset input pin with pull-up. It is used as a general purpose pin (PA1) and can be
configured only as output push-pull, not as output open drain or as a general purpose input. Refer to Section Configuring
NRST/PA1 pin as general purpose output in STM8L051/L052 Value Line, STM8L151/L152, STM8L162, STM8AL31,
STM8AL3L MCU lines reference manual (RM0031).
2. Available on STM8AL3Lxx devices only.
3. In the 3.6 V tolerant I/Os, protection diode to VDD is not implemented.
4.
[ ] Alternate function remapping option (if the same alternate function is shown twice, it indicates an exclusive choice not a
duplication of the function).
5. In the 5 V tolerant I/Os, protection diode to VDD is not implemented.
6. A pull-up is applied to PB0 and PB4 during the reset phase. These two pins are input floating after reset release.
7. In the open-drain output column, ‘T’ defines a true open-drain I/O (P-buffer, weak pull-up and protection diode to VDD are
not implemented).
8. Available on STM8AL31xx devices only.
9. The PA0 pin is in input pull-up during the reset phase and after reset release.
10. High sink LED driver capability available on PA0.
Table 5. Medium-density STM8AL313x/4x/6x and STM8AL3L4x/6x pin description (continued)
Pin number
Pin name
Input
Output
Default alternate
function



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