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STM8AL3136 数据表(PDF) 46 Page - STMicroelectronics |
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STM8AL3136 数据表(HTML) 46 Page - STMicroelectronics |
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46 / 124 page  Memory and register map STM8AL313x/4x/6x STM8AL3L4x/6x 46/124 DocID18474 Rev 7 0x00 5265 TIM2 TIM2_BKR TIM2 break register 0x00 0x00 5266 TIM2_OISR TIM2 output idle state register 0x00 0x00 5267 to 0x00 527F Reserved area (25 bytes) 0x00 5280 TIM3 TIM3_CR1 TIM3 control register 1 0x00 0x00 5281 TIM3_CR2 TIM3 control register 2 0x00 0x00 5282 TIM3_SMCR TIM3 Slave mode control register 0x00 0x00 5283 TIM3_ETR TIM3 external trigger register 0x00 0x00 5284 TIM3_DER TIM3 DMA1 request enable register 0x00 0x00 5285 TIM3_IER TIM3 interrupt enable register 0x00 0x00 5286 TIM3_SR1 TIM3 status register 1 0x00 0x00 5287 TIM3_SR2 TIM3 status register 2 0x00 0x00 5288 TIM3_EGR TIM3 event generation register 0x00 0x00 5289 TIM3_CCMR1 TIM3 capture/compare mode register 1 0x00 0x00 528A TIM3_CCMR2 TIM3 capture/compare mode register 2 0x00 0x00 528B TIM3_CCER1 TIM3 capture/compare enable register 1 0x00 0x00 528C TIM3_CNTRH TIM3 counter high 0x00 0x00 528D TIM3_CNTRL TIM3 counter low 0x00 0x00 528E TIM3_PSCR TIM3 prescaler register 0x00 0x00 528F TIM3_ARRH TIM3 Auto-reload register high 0xFF 0x00 5290 TIM3_ARRL TIM3 Auto-reload register low 0xFF 0x00 5291 TIM3_CCR1H TIM3 capture/compare register 1 high 0x00 0x00 5292 TIM3_CCR1L TIM3 capture/compare register 1 low 0x00 0x00 5293 TIM3_CCR2H TIM3 capture/compare register 2 high 0x00 0x00 5294 TIM3_CCR2L TIM3 capture/compare register 2 low 0x00 0x00 5295 TIM3_BKR TIM3 break register 0x00 0x00 5296 TIM3_OISR TIM3 output idle state register 0x00 0x00 5297 to 0x00 52AF Reserved area (25 bytes) 0x00 52B0 TIM1 TIM1_CR1 TIM1 control register 1 0x00 0x00 52B1 TIM1_CR2 TIM1 control register 2 0x00 0x00 52B2 TIM1_SMCR TIM1 Slave mode control register 0x00 0x00 52B3 TIM1_ETR TIM1 external trigger register 0x00 0x00 52B4 TIM1_DER TIM1 DMA1 request enable register 0x00 0x00 52B5 TIM1_IER TIM1 Interrupt enable register 0x00 Table 9. General hardware register map (continued) Address Block Register label Register name Reset status |
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