| 数据搜索系统,热门电子元器件搜索 |
|
STM8AF6213 数据表(PDF) 86 Page - STMicroelectronics |
|
|
|||||||||||||||||||||||||||||
STM8AF6213 数据表(HTML) 86 Page - STMicroelectronics |
|
86 / 106 page ![]() Electrical characteristics STM8AF6213/23/23A/26 86/106 DocID025118 Rev 5 9.3.10 10-bit ADC characteristics Subject to general operating conditions for VDD, fMASTER, and TA unless otherwise specified. Table 54. ADC characteristics Symbol Parameter Conditions Min Typ Max Unit fADC ADC clock frequency VDD = 3 to 5.5 V 1 - 4 MHz VDD = 4.5 to 5.5 V 1 - 6 VAIN Conversion voltage range(1) 1. During the sample time the input capacitance CAIN (3 pF max) can be charged/discharged by the external source. The internal resistance of the analog source must allow the capacitance to reach its final voltage level within tS. After the end of the sample time tS, changes of the analog input voltage have no effect on the conversion result. Values for the sample clock tS depend on programming. - VSS - VDD V VBGREF Internal bandgap reference voltage VDD = 3 to 5.5 V 1.19(2) 2. Tested in production. 1.22 1.25(2) V CADC Internal sample and hold capacitor -- 3 - pF tS(1) Minimum sampling time fADC = 4MHz - 0.75 - µs fADC = 6 MHz - 0.5 - tSTAB Wakeup time from standby - - 7 - tCONV Minimum total conversion time including sampling time, 10-bit resolution fADC = 4 Hz 3.5 µs fADC = 6 MHz 2.33 -14 1/fADC |
|
链接网址 |
| ALLDATASHEET是否为您带来帮助? [ DONATE ] |
关于 Alldatasheet | 广告服务 | 联系我们 | 隐私政策 | 数据表链接 | 链接交换 | 制造商名单 All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |