STM8AF6213 datasheet(47/106 Pages) STMICROELECTRONICS

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STM8AF6213/23/23A/26

Option bytes

103

Option bytes

Option bytes contain configurations for device hardware features as well as the memory

protection of the device. Except for the ROP (read-out protection) byte, each option byte has

to be stored twice, in a regular form (OPTx) and a complemented one (NOPTx) for

redundancy.

Option bytes can be modified in ICP mode (via SWIM) by accessing the EEPROM address

shown in Table 14: Option bytes below.

Option bytes can also be modified ‘on the fly’ by the application in IAP mode, except the

ROP and UBC options that can only be modified in ICP mode (via SWIM).

Refer to the STM8 Flash programming manual (PM0051) and STM8 SWIM communication

protocol and debug module user manual (UM0470) for information on SWIM programming

procedures.

Table 14. Option bytes

Addr.

Option

name

Option

byte no.

Option bits

Factory

default

setting

0x00

4800

Read-out

protection

(ROP)

OPT0

ROP[7:0]

0x00

4801

User boot

code (UBC)

OPT1

UBC[7:0]

0x00

4802

NOPT1

NUBC[7:0]

0xFF

0x00

4803

Alternate

function

remapping

(AFR)

OPT2

AFR7

AFR6

AFR5

AFR4

AFR3

AFR2

AFR1

AFR0

0x00

4804

NOPT2

NAFR7

NAFR6

NAFR 5

NAFR 4

NAFR 3

NAFR 2

NAFR 1

NAFR 0

0xFF

0x00

4805

Miscell.

option

OPT3

Reserved

HSI

TRIM

LSI

_EN

IWDG

_HW

WWDG

_HW

WWDG

_HALT

0x00

4806

NOPT3

Reserved

NHSI

TRIM

NLSI

_EN

NIWDG

_HW

NWWDG

_HW

NWWG

_HALT

0xFF

0x00

4807

Clock option

OPT4

Reserved

EXT

CLK

CKAWU

SEL

PRS

0x00

4808

NOPT4

Reserved

CLK

NCKAWU

SEL

NPRS

0xFF

0x00

4809

HSE clock

startup

OPT5

HSECNT[7:0]

0x00

480A

NOPT5

NHSECNT[7:0]

0xFF

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