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STM32L475VC 数据表(PDF) 170 Page - STMicroelectronics |
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STM32L475VC 数据表(HTML) 170 Page - STMicroelectronics |
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170 / 193 page  Electrical characteristics STM32L475xx 170/193 DocID027692 Rev 2 Figure 32. SDIO high-speed mode CMD, D outputs (referenced to CK) in SD default mode tOVD Output valid default time SD fPP = 50 MHz - 4.5 5 ns tOHD Output hold default time SD fPP = 50 MHz 0 - - ns 1. Guaranteed by characterization results. Table 88. eMMC dynamic characteristics, VDD = 1.71 V to 1.9 V(1)(2) 1. Guaranteed by characterization results. 2. CLOAD = 20pF. Symbol Parameter Conditions Min Typ Max Unit fPP Clock frequency in data transfer mode - 0 - 50 MHz - SDIO_CK/fPCLK2 frequency ratio - - - 4/3 - tW(CKL) Clock low time fPP = 50 MHz 8 10 - ns tW(CKH) Clock high time fPP = 50 MHz 8 10 - ns CMD, D inputs (referenced to CK) in eMMC mode tISU Input setup time HS fPP = 50 MHz 0 - - ns tIH Input hold time HS fPP = 50 MHz 5 - - ns CMD, D outputs (referenced to CK) in eMMC mode tOV Output valid time HS fPP = 50 MHz - 13.5 15.5 ns tOH Output hold time HS fPP = 50 MHz 9 - - ns Table 87. SD / MMC dynamic characteristics, VDD=2.7 V to 3.6 V(1) (continued) Symbol Parameter Conditions Min Typ Max Unit |
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