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USB84604 数据表(PDF) 12 Page - Microchip Technology |
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USB84604 数据表(HTML) 12 Page - Microchip Technology |
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12 / 61 page ![]() USB84604 DS60001295C-page 12 2014-2016 Microchip Technology Inc. 1 Downstream USB D- (Port 4) USBDN4_DM AIO Downstream USB Port 4 D- data signal. Port 4 D- Disable Configuration Strap PRT_DIS_M4 IS This strap is used in conjunction with PRT_DIS_P4 to disable USB Port 4. 0 = Port 4 D- Enabled 1 = Port 4 D- Disabled Note: Both PRT_DIS_P4 and PRT_DIS_M4 must be tied to VDD33 at reset to dis- able the associated port. See Note 2 for more information on configuration straps. I2C/SMBus Interface 1I2C Serial Clock Input SCL I_SMB I2C/SMBus serial clock output (Bridging) SMBus Clock SMBCLK I_SMB I2C/SMBus serial clock input General Pur- pose I/O 2 PIO2 IS/O8/ OD8 General purpose I/O 2 1I2C Serial Data SDA IS/OD8 I2C bidirectional serial data SMBus Serial Data SMBDATA IS/OD8 SMBus bidirectional serial data General Pur- pose I/O 45 PIO45 IS/O8 OD8 General purpose I/O 45 SPI Master Interface 1 SPI Chip Enable Output SPI_CE_N O6 Active-low SPI chip enable output. Note: If the SPI is enabled, this pin will be driven high in powerdown states. 1 SPI Clock Output SPI_CLK O6 SPI clock output General Pur- pose I/O 4 PIO4 IS/O6/ OD6 General purpose I/O 4 Note: If the SPI is disabled, by setting the SPI_MASTER_DIS bit in the UTIL_- CONFIG1 register, this pin may be used as PIO4. TABLE 3-1: PIN DESCRIPTIONS (CONTINUED) Num Pins Name Symbol Buffer Type Description |
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