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USB84604 数据表(PDF) 17 Page - Microchip Technology |
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USB84604 数据表(HTML) 17 Page - Microchip Technology |
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17 / 61 page ![]() 2014-2016 Microchip Technology Inc. DS60001295C-page 17 USB84604 Note 1: When the device is configured to enable the HSIC upstream port, the USB Product ID (PID) will be 0x4604. When the device is configured to enable the USB upstream port, the USB PID will be 0x4504. 1 Battery Power Supply Input VBAT P Battery power supply input. When VBAT is con- nected directly to a +3.3 V supply from the sys- tem, the internal +3.3 V regulator runs in dropout and regulator power consumption is eliminated. A 4.7 µF (<1 Ω ESR) capacitor to ground is required for regulator stability. The capacitor should be placed as close as possible to the device. Refer to Chapter 4.0 Power Connections on page 21 for power connection information. 3+3.3 V Analog Power Supply VDDA33 P +3.3 V analog power supply. A 1.0 µF (<1 Ω ESR) capacitor to ground is required for regulator stabil- ity. The capacitor should be placed as close as possible to the device. Refer to Chapter 4.0 Power Connections on page 21 for power connec- tion information. 2+3.3 V Power Supply VDD33 P +3.3 V power supply. These pins must be con- nected to VDDA33. Refer to Chapter 4.0 Power Connections on page 21 for power connection information. 1 +1.8 - 3.3 V Core Power Supply Input VDDCOREREG P +1.8 - 3.3 V core power supply input to internal +1.2 V regulator. This pin may be connected to VDD33 for single supply applications when VBAT equals +3.3 V. Running in a dual supply configu- ration with VDDCOREREG at a lower voltage, such as +1.8 V, may reduce overall system power consumption. In dual supply configurations, a 4.7 µF (<1 Ω ESR) capacitor to ground is required for regulator stability. The capacitor should be placed as close as possible to the device. Refer to Chapter 4.0 Power Connections on page 21 for power connection information. 3 +1.2 V Core Power Supply VDDCR12 P +1.2 V core power supply. In single supply appli- cations or dual supply applications where 1.2 V is not used, a 1.0 µF (<1 Ω ESR) capacitor to ground is required for regulator stability. The capacitor should be placed as close as possible to the device. Refer to Chapter 4.0 Power Connec- tions on page 21 for power connection informa- tion. 1 +1.2 V HSIC Power Supply Input VDD12 P +1.2 V HSIC power supply input. Refer to Chapter 4.0 Power Connections on page 21 for power connection information. Exposed Pad on package bot- tom (Figure 2-1) Ground VSS P Common ground. This exposed pad must be con- nected to the ground plane with a via array. TABLE 3-1: PIN DESCRIPTIONS (CONTINUED) Num Pins Name Symbol Buffer Type Description |
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