Copyright © 2014 Future Technology Devices International Limited

38

Document No.: FT_000646

FT120 USB DEVICE CONTROLLER WITH PARALLEL BUS IC

Datasheet Version 1.2

Clearance No.: FTDI#

291

Appendix A - List of Figures and Tables

List of Figures

Figure 2-1 FT120 Block Diagram.....................................................................................................3

Figure 3-1 TSSOP-28 package schematic symbol ..............................................................................6

Figure 3-2 QFN-28 package schematic symbol..................................................................................6

Figure 7-1 FT120 Reference schematics......................................................................................... 24

Figure 8-1 ALE Timing ................................................................................................................. 28

Figure 8-2 Parallel interface timing ............................................................................................... 29

Figure 8-3 Single cycle DMA timing ............................................................................................... 30

Figure 8-4 Burst mode DMA timing ............................................................................................... 30

Figure 8-5 DMA terminated by EOT_n ........................................................................................... 30

Figure 9-1 TSSOP-28 Package Dimensions ..................................................................................... 31

Figure 9-2 TSSOP-28 Package Markings ........................................................................................ 32

Figure 9-4 QFN-28 Package Markings ........................................................................................... 34

Figure 9-5 FT120 Solder Reflow Profile .......................................................................................... 35

List of Tables

Table 3-1 FT120 Pin Description .....................................................................................................8

Table 4-1 Interrupt modes ........................................................................................................... 10

Table 5-1 Endpoint configuration for EP0 and EP1 ........................................................................... 11

Table 5-2 Endpoint configuration for EP2 ....................................................................................... 11

Table 6-1 FT120 command set ..................................................................................................... 14

Table 6-2 Address Enable Register ................................................................................................ 14

Table 6-3 Endpoint Enable Register............................................................................................... 15

Table 6-4 Configuration Register (Byte 1) ...................................................................................... 16

Table 6-5 Clock Division Factor Register (Byte 2)............................................................................ 16

Table 6-6 DMA Configuration Register ........................................................................................... 17

Table 6-7 Interrupt Register Byte 1............................................................................................... 18

Table 6-8 Interrupt Register Byte 2............................................................................................... 18

Table 6-9 Endpoint Status Register ............................................................................................... 19

Table 6-10 Endpoint Last Transaction Status Register ..................................................................... 19

Table 6-11 Transaction error code ................................................................................................ 20

Table 6-12 Endpoint Buffer Status Register .................................................................................... 21

Table 6-13 Endpoint Control Register ............................................................................................ 22

Table 6-14 Frame Number LSB Register ........................................................................................ 23

Table 6-15 Frame Number MSB Register........................................................................................ 23

Table 8-1 Absolute Maximum Ratings............................................................................................ 25

Table 8-2 Operating Voltage and Current ....................................................................................... 26

Table 8-3 digital I/O Pin Characteristics ......................................................................................... 26

Table 8-4 USB I/O Pin (USBDP, USBDM) Characteristics .................................................................. 27

Table 8-5 Crystal or clock Characteristics (OSCI, OSCO pins) ........................................................... 27

Table 8-6 Parallel Interface IO timing ............................................................................................ 28