Copyright © 2014 Future Technology Devices International Limited

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Document No.: FT_000646

FT120 USB DEVICE CONTROLLER WITH PARALLEL BUS IC

Datasheet Version 1.2

Clearance No.: FTDI#

291

4 Function Description

The FT120 is a USB device controller which interfaces with microcontrollers via a generic 8-bit parallel

bus.

The following sections describe the function of each block. Please refer to the block diagram shown in

Figure 2-1.

+1.8V LDO Regulator. The +1.8V LDO regulator generates the +1.8V reference voltage for the internal

core of the IC with input capabilities from 3.3V or 5V.

+3.3V LDO Regulator. The +3.3V LDO regulator generates the +3.3V supply voltage for the USB

transceiver. An external decoupling capacitor needs to be attached to the VOUT3V3 regulator output pin.

The regulator also provides +3.3V power to the 1.5kΩ internal pull up resistor on USBDP pin. The

allowable input voltages are 5V or 3.3V. When using 3.3V as the input voltage, the VCC and VOUT3V3

pins should be tied together. This will result in the regulator being by-passed.

USB Transceiver. The USB Transceiver cell provides the USB 1.1 / USB 2.0 full-speed physical interface.

Output drivers provide +3.3V level slew rate control , while a differential input and two single ended

input receivers provide data in, Single-Ended-0 (SE0) and USB reset detection conditions respectfully. A

1.5kΩ pull up resistor on USBDP is incorporated.

DPLL. The DPLL cell locks on to the incoming NRZI USB data and generates recovered clock and data

signals.

Internal Oscillator. The Internal Oscillator cell generates a 6MHz reference clock from the 6MHz crystal.

The Oscillator also has the capability of running from an external clock applied on the OSCI pin. This

provides an input to the Clock Multiplier function.

Clock Multiplier. The 12MHz and 48MHz reference clock signals for various internal blocks can be

generated from the 6 MHz via the oscillator functions and clock multiplier circuitry.

Serial Interface Engine (SIE). The Serial Interface Engine (SIE) block performs the parallel to serial

and serial to parallel conversion of the USB data. In accordance with the USB 2.0 specification, it

performs bit stuffing/un-stuffing and CRC5/CRC16 generation. It also checks the CRC on the USB data

stream.