Copyright © 2013 Future Technology Devices International Limited

43

FT221X USB 8-BIT SPI/FT1248 IC Datasheet

Version 1.3

Document No.: FT_000630 Clearance No.: FTDI# 263

Appendix B - List of Figures and Tables

List of Figures

Figure 2.1 FT221X Block Diagram ...................................................................................................4

Figure 3.1 QFN Schematic Symbol ..................................................................................................7

Figure 3.2 SSOP Schematic Symbol ................................................................................................9

Figure 5.1: FT1248 Basic Waveform Protocol.................................................................................. 14

Figure 5.2: FT1248 Command Structure ........................................................................................ 15

Figure 5.3: FT1248 Clock Format CPHA = 1 ................................................................................... 17

Figure 5.4: FT1248 Clock Format CPHA = 1 ................................................................................... 18

Figure 7.1 Bus Powered Configuration ........................................................................................... 26

Figure 7.2 Self Powered Configuration ........................................................................................... 27

Figure 7.3 Bus Powered with Power Switching Configuration ............................................................ 28

Figure 7.4 USB Battery Charging Detection .................................................................................... 29

Figure 8.1 Application Example showing USB to FT1248 host ........................................................... 30

Figure 8.2 FT1248 8- bit write timing diagram................................................................................ 31

Figure 8.3 FT1248 8- bit read timing diagram ................................................................................ 32

Figure 9.1: Simplified memory map for the FT-X ............................................................................ 35

Figure 10.1 SSOP-20 Package Dimensions ..................................................................................... 36

Figure 10.2 QFN-20 Package Markings .......................................................................................... 37

Figure 10.3 QFN-20 Package Dimensions ....................................................................................... 38

Figure 10.4 QFN-20 Package Markings .......................................................................................... 39

Figure 10.5 FT221X Solder Reflow Profile....................................................................................... 40

List of Tables

Table 3.1 Power and Ground ..........................................................................................................7

Table 3.2 Common Function pins ....................................................................................................8

Table 3.3 FT1248 Interface and CBUS Group (see note 1)..................................................................8

Table 3.4 Power and Ground ..........................................................................................................9

Table 3.5 Common Function pins ....................................................................................................9

Table 3.6 FT1248 Interface and CBUS Group (see note 1)................................................................ 10

Table 3.7 CBUS Configuration Control ........................................................................................... 11

Table 5.1: FT1248 Commands...................................................................................................... 16

Table 5.2: CPOL & CPHA Mode Numbers ........................................................................................ 16

Table 5.3: 1V8 VCCIO timings ...................................................................................................... 18

Table 5.4: 2V5 VCCIO timings ...................................................................................................... 19

Table 5.5: 3V3 VCCIO timings ...................................................................................................... 19

Table 6.1 Absolute Maximum Ratings ............................................................................................ 20

Table 6.2 ESD and Latch-Up Specifications .................................................................................... 20

Table 6.3 Operating Voltage and Current ....................................................................................... 21

Table 6.4 I/O Pin Characteristics VCCIO = +3.3V (except USB PHY pins) ........................................... 22

Table 6.5 I/O Pin Characteristics VCCIO = +2.5V (except USB PHY pins) ........................................... 23

Table 6.6 I/O Pin Characteristics VCCIO = +1.8V (except USB PHY pins) ........................................... 24