FT313HQ-R datasheet(27/67 Pages) FTDI

27 / 67 page

Document No.: FT_000589

FT313H USB2.0 HS Host Controller Datasheet Version 1.2

Clearance No.: FTDI# 318

5.2.10

POSTSC register (address = 30h)

The port status and control register is in the power well. It is only reset by hardware when the power is

initially applied or in response to a host controller reset. The initial conditions of a port are:



No peripheral connected



Port disable

The software must not attempt to change the state of the port until the power is stable on the port. The

host is required to have power stable to the port within 20 milliseconds of the zero to one transition.

When a peripheral device is attached, the port state transitions to the connected state and system

software will process this as with any status change notification.

Bit

Name

Type

Default value

Description

[31:17]

Reserved

15’h0

TST_FORCEEN

R/W

1’b0

Test Force Enable

When this signal is written as ‘1,’ the

downstream facing port will be enabled in the

high-speed mode. Then the Run/Stop bit must

be transitioned to one in order to enable the

transmission of the SOFs out of the port under

test. This enables testing of the disconnect

detection.

[15:12]

Reserved

4’b0

[11:10]

LINE_STS

2’b00

Line Status

These bits reflect the current logical levels of the

D+ and D- signal lines.

Bits[11:10]

USB state

00b

SE0

10b

J-state

01b

K-state

11b

Undefined

Reserved

1’b0

PO_RESET

R/W

1’b0

Port Reset

1 = Port is in the reset state.

0 = Port is not in the reset state.

When the software writes a ‘1’ to this bit, the

bus reset sequence as defined in the USB

specification will start.

Software writes a ‘0’ to this bit to terminate the

bus reset sequence. Software must keep this bit

at a ‘1’ long enough to ensure the reset

sequence.

Note: Reset signal which shall be followed by the

USB2.0 chapter 7.1.7.5 Reset Signal

requirement. If detected HS device, the software

shall wait more than 200us for port reset

clearing. Before setting this bit, RUN/STOP bit

should be set to ‘0.’

PO_SUSP

R/W

1’b0

Port Suspend

1 = Port is in the suspend state

0 = Port is not in the suspend state.

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