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TNETV2685FIBZUT7 数据表(PDF) 169 Page - Texas Instruments

部件名 TNETV2685FIBZUT7
功能描述  Digital Media Processor
PDF  191 Pages
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制造商  TI1 [Texas Instruments]
网页  http://www.ti.com
标志 TI1 - Texas Instruments

TNETV2685FIBZUT7 数据表(HTML) 169 Page - Texas Instruments

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TMS320DM647
TMS320DM648
www.ti.com
SPRS372H – MAY 2007 – REVISED APRIL 2012
Table 6-78. Ethernet Switch Registers (continued)
HEX ADDRESS RANGE
REGISTER ACRONYM
DESCRIPTION
0x02D0 3454
TXEXCESSIVECOLLISIONS
CPSW_STATS ExcessiveCollisions
0x02D0 3458
TXLATECOLLISIONS
CPSW_STATS LateCollisions
0x02D0 345C
TXUNDERRUN
CPSW_STATS Transmit Underrun Error
0x02D0 3460
TXCARRIERSENSEERRORS
CPSW_STATS CarrierSenseErrors
0x02D0 3464
TXOCTETS
CPSW_STATS TxOctets
0x02D0 3468
OCTETFRAMES64
CPSW_STATS 64octetFrames
0x02D0 346C
OCTETFRAMES65T127
CPSW_STATS 65-127octetFrames
0x02D0 3470
OCTETFRAMES128T255
CPSW_STATS 128-255octetFrames
0x02D0 3474
OCTETFRAMES256T511
CPSW_STATS 256-511octetFrames
0x02D0 3478
OCTETFRAMES512T1023
CPSW_STATS 512-1023octetFrames
0x02D0 347C
OCTETFRAMES1024TUP
CPSW_STATS 1023-1518octetFrames
0x02D0 3480
NETOCTETS
CPSW_STATS NetOctets
0x02D0 3484
RXSOFOVERRUNS
CPSW_STATS Receive FIFO or DMA Start of Frame
Overruns
0x02D0 3488
RXMOFOVERRUNS
CPSW_STATS Receive FIFO or DMA Mid of Frame
Overruns
0x02D0 348C
RXDMAOVERRUNS
CPSW_STATS Receive DMA Start of Frame and Middle of
Frame Overruns
0x02D0 3490 - 0x02D0 34FC
reserved
0x02D0 3500
ALE_IDVER
ALE Identification and Version Register
0x02D0 3504
reserved
0x02D0 3508
ALE_CONTROL
ALE Control Register
0x02D0 350C
reserved
0x02D0 3510
ALE_PRESCALE
ALE Prescale Register
0x02D0 3514
reserved
0x02D0 3518
ALE_UNKNOWN_VLAN
ALE Unknown VLAN Register
0x02D0 351C
reserved
0x02D0 3520
ALE_TBLCTL
ALE Table Control Register
0x02D0 3524 - 0x02D0 3530
reserved
0x02D0 3534
ALE_TBLW2
ALE Table Word 2 Register
0x02D0 3538
ALE_TBLW1
ALE Table Word 1 Register
0x02D0 353C
ALE_TBLW0
ALE Table Word 0 Register
0x02D0 3540
ALE_PORTCTL0
ALE Port 0 Control Register
0x02D0 3544
ALE_PORTCTL1
ALE Port 1 Control Register
0x02D0 3548
ALE_PORTCTL2
ALE Port 2 Control Register
0x02D0 354C - 0x02D0 37FF
reserved
Table 6-79. Ethernet Subsystem Registers
HEX ADDRESS RANGE
REGISTER ACRONYM
DESCRIPTION
0x02D0 2000
IDVER
Identification and Version Register
0x02D0 2004
SOFT_RESET
Soft Reset Register
0x02D0 2008
EM_CONTROL
Emulation Control Register
0x02D0 200C
INT_CONTROL
Interrupt Control Register
0x02D0 2010
RX_THRESH_EN
Receive Threshold Interrupt Enable Register
0x02D0 2014
RX_EN
Receive Interrupt Enable Register
0x02D0 2018
TX_EN
Transmit Interrupt Enable Register
0x02D0 201C
MISC_EN
Misc Interrupt Enable Register
0x02D0 2020
RX_THRESH_STAT
Receive Threshold Masked Interrupt Status Register
Copyright © 2007–2012, Texas Instruments Incorporated
Peripheral Information and Electrical Specifications
169
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Product Folder Link(s): TMS320DM647 TMS320DM648



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