TNETV2685FIBZUT9 datasheet(28/191 Pages) TI1

28 / 191 page

TMS320DM647

TMS320DM648

SPRS372H – MAY 2007 – REVISED APRIL 2012

www.ti.com

Table 2-4. Terminal Functions (continued)

TERMINAL NAME

TYPE(

INTERNAL

OPER

DESCRIPTION

PULLUP/

VOLT

PULLDOWN

VP4CTL2/ ASADS/

I/O/Z

IPD

3.3 V

Video Port 4 Control 2 or Programmable synchronous address

ASRE

strobe or read-enable. For programmable synchronous interface,

the r_enable field in the ChipSelect x Configuration Register

selects between ASADS and ASRE:

– If r_enable = 0, then the ASADS/ASRE signal functions as the

ASADS signal.

– If r_enable = 1, then the ASADS/ASRE signal functions as the

ASRE signal.

VP4D02/ ABE00

I/O/Z

IPU

3.3 V

Video Port 4 Data 2 or EMIFA byte-enable control 0. Decoded

from the low-order address bits. The number of address bits or

byte enables used depends on the width of external memory.

Byte-write enables for most types of memory.

VP4D03/ABE01

I/O/Z

IPU

3.3 V

Video Port 4 Data 3 or EMIFA byte-enable control 1. Number of

address bits or byte enables used depends on the width of

external memory. Byte-write enables for most types of memory.

VP4D04/AEA10

I/O/Z

IPU

3.3 V

Video Port 4 Data 4 or EMIFA External Address 10 (word address)

(O/Z)

VP4D05

I/O/Z

IPU

3.3 V

Video Port 4 Data 5

VP4D06/ACE2

I/O/Z

IPU

3.3 V

Video Port 4 Data 6 or EMIFA memory space enable 2

VP4D07/ACE3

I/O/Z

IPU

3.3 V

Video Port 4 Data 7 or EMIFA memory space enable 3

VP4D08/AEA00

I/O/Z

IPD

3.3 V

Video Port 4 Data 8 or EMIFA External Address 0 (word address)

(O/Z)

VP4D09/AEA01

I/O/Z

IPD

3.3 V

Video Port 4 Data 9 or EMIFA External Address 1 (word address)

(O/Z)

VP4D12/AEA02

I/O/Z

IPD

3.3 V

Video Port 4 Data 12 or EMIFA External Address 2 (word address)

(O/Z)

VP4D13/AEA03

I/O/Z

IPD

3.3 V

Video Port 4 Data 13 or EMIFA External Address 3 (word address)

(O/Z)

VP4D14/AEA04

I/O/Z

IPD

3.3 V

Video Port 4 Data 14 or EMIFA External Address 4 (word address)

(O/Z)

VP4D15/AEA05

I/O/Z

IPD

3.3 V

Video Port 4 Data 15 or EMIFA External Address 5 (word address)

(O/Z)

VP4D16/AEA06

I/O/Z

IPD

3.3 V

Video Port 4 Data 16 or EMIFA External Address 6 (word address)

(O/Z)

VP4D17/AEA07

I/O/Z

IPD

3.3 V

Video Port 4 Data 17 or EMIFA External Address 7 (word address)

(O/Z)

VP4D18/AEA08

I/O/Z

IPD

3.3 V

Video Port 4 Data 18 or EMIFA External Address 8 (word address)

(O/Z)

VP4D19/AEA09

I/O/Z

IPD

3.3 V

Video Port 4 Data 19 or EMIFA External Address 9 (word address)

(O/Z)

EMIFA

AEA23

IPD

3.3 V

EMIFA External Address 23 (word address) (O/Z)

AEA19

O/Z

IPU

3.3 V

EMIFA External Address 19 (word address) (O/Z)

AECLKINSEL/AEA17

I/O/Z

IPD

3.3 V

Select EMIFA external clock (I) (The EMIFA input clock AECLKIN

or SYSCLK4 is selected at reset via the pullup/pulldown resistor

on this pin. Note: AECLKIN is the default for the EMIFA input

clock.)

or EMIFA external address 17 (word address) (O/Z)

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