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TNETV2685FIBZUT9 数据表(PDF) 44 Page - Texas Instruments |
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TNETV2685FIBZUT9 数据表(HTML) 44 Page - Texas Instruments |
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44 / 191 page  TMS320DM647 TMS320DM648 SPRS372H – MAY 2007 – REVISED APRIL 2012 www.ti.com 3.2.6 PINMUX Register All pin multiplexing options are controlled by software via PINMUX register (except the ones mentioned in Table 3-8, whose default is selected by configuration pins). This PINMUX register reside within the system module portion of the CFG bus memory map. The format of the registers and a description of the pins they control are in the following sections. The PINMUX Register controls all the software-controlled pin muxing. The register format is shown in Figure 3-6. A brief description of each field is shown in Table 3-7. Figure 3-6. PINMUX Register 31 22 21 20 19 18 17 16 Reserved GPIO_EN Reserved VPI_EN R-0000 0000 00 R/W-00 R-00 R/W-00 15 14 13 12 11 10 9 8 7 6 5 4 3 1 0 TIMER VP34_EN SPI_UART_EN Reserved MCASP_EN Reserved VLYNQ_EN Reserved _EN R/W-00 R/W-00 R-00 R/W-00 R-00 R/W-00 R-000 R/W-0 LEGEND: R/W = Read/Write; R = Read only; -n = value after reset Table 3-7. PINMUX Register Field Descriptions Bit Field Value Description 31:22 Reserved Reserved 21:20 GPIO_EN Controls the pin muxing between Video Port 0 and the GPIO[12:15] UNMUXED(1) UNMUXED (2) SECONDARY MUXED(3) .VP0D16-19 VP0D02-09/CLK/CTL VP0D12-15 GP12-15 00 3-state 3-state 3-state 01 3-state 3-state 3-state 10 Enable Enable VP0D12-15 11 3-state Enable GP12-15 19:18 Reserved Reserved 17:16 VP1_EN Controls the pin muxing between Video Port 1 and GPIO[16:31] UNMUXED(4) MUXED (5) VP1CLK0- VP1 Data GP[16-31] 1/VP1CTL0-2 (V1D02-09/12-19) 00 3-state 3-state 01 3-state 3-state 10 3-state GP16-31 11 Enable VP1D02-09 and VP1D12-19 (1) The complete list of pins: U20, U21, U22, R18. (2) The complete list of pins: Y23, V23, Y22, V22, U23, W20, V18, U18, V19, W21, T18, U19, V20. (3) The complete list of pins: V21, T19, T20, T21. (4) The complete list of pins: P23, N23, R23, P22, N22 (5) The complete list of pins: R19, P19, P18, R22, R21, R20, N21, N20, N19, P21, P20, M20, M18, N18, M21, M19 44 Device Configuration Copyright © 2007–2012, Texas Instruments Incorporated Submit Documentation Feedback Product Folder Link(s): TMS320DM647 TMS320DM648 |
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