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ST7MC1K2 数据表(PDF) 201 Page - STMicroelectronics

部件名 ST7MC1K2
功能描述  Clock, reset and supply management
PDF  371 Pages
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制造商  STMICROELECTRONICS [STMicroelectronics]
网页  http://www.st.com
标志 STMICROELECTRONICS - STMicroelectronics

ST7MC1K2 数据表(HTML) 201 Page - STMicroelectronics

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Obsolete
Product(s)
- Obsolete
Product(s)
ST7MC1K2-Auto, ST7MC1K6-Auto, ST7MC2S4-Auto, ST7MC2S6-Auto
On-chip peripherals
201/371
Figure 83.
Z event generation
1. Preload register; changes taken into account at next C event.
2.
Register updated on R event.
Protection for ZH event detection
To avoid an erroneous detection of a hardware zero-crossing event, a filter can be enabled by setting the
PZ bit in the MCRA register. This filter ensures the detection of a ZH event on an edge transition between
D event and ZH event.
Without this protection, ZH event detection is done directly on the current sample in comparison with the
expected state at the output of the phase comparator. For example, if a falling edge transition (meaning a
transition from 1 to 0 at the output of the phase comparator) is configured for ZH event through the CPB
bit in MCRB register, then, the state 0 is expected at the comparator output and once this state is
detected, the ZH event is generated without any verification that the state at the comparator output of the
previous sample was 1. The purpose of this protection filter is to be sure that the state of the comparator
output at the sample before was really the opposite of the current state which is generating the ZH event.
With this filter, the ZH event generation is done on edge transition level comparison.
This filter is not needed in sensor mode (SR = 1) and for simulated zero-crossing event (ZS) generation.
When the PZ bit is set, the Z event filter ZEF[3:0] in the MZFR register is ignored.
ZVD bit
or
or
or
1
2
REO bit
CS,H
DS,H
CPBn bit
(1)
Sample
MPOL register
MCRB register
MPOL register
PZ bit
MCRA register
To D detection
ZS
SZ bit
Z=ZH and HZ bit + ZS and SZ bit
ZH
F(x)
MTIM [8-bit up counter] (MSB) (2)
ZS
MZREG [Zn]
(2)
Compare
8
ZH
SZ bit
MCRC register
MZFR register
ZWF[3:0]
SPLG bit
DS[3:0]
bits
HZ bit
MCRC register
HZ bit
ZH
Z
To interrupt generator
MZFR register
ZEF[3:0]
ZWF[3:0]
Obsolete
Product(s)
- Obsolete
Product(s)



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