ST7MC1K2 datasheet(265/371 Pages) STMICROELECTRONICS

265 / 371 page

Obsolete

Product(s)

- Obsolete

Product(s)

ST7MC1K2-Auto, ST7MC1K6-Auto, ST7MC2S4-Auto, ST7MC2S6-Auto

On-chip peripherals

265/371

Note:

Loading value FFh in the MISR register resets the PWM generator counter and transfers the

compare preload registers in the active registers by generating a U event (PUI bit set to 1).

Refer to Timer resynchronization on page 258.

When several MTC interrupts are enabled at the same time the BRES instruction must not

be used to avoid unwanted clearing of status flags: if a second interrupt occurs while BRES

is executed (which performs a read-modify-write sequence) to clear the flag of a first

interrupt, the flag of the second interrupt may also be cleared and the corresponding

interrupt routine is not serviced. It is thus recommended to use a load instruction to clear the

flag, with a value equal to the logical complement of the bit. For instance, to clear the PUI

flag:

ld MISR, # 0x7F.

In autoswitched mode (SWA = 1 in the MRCA register): As all bits in the MISR register are

status flags, they are set by internal hardware signals and must be cleared by software. Any

attempt to write them to 1 has no effect (they are read as 0) without interrupt generation.

In switched mode (SWA = 0 in the MRCA register): To avoid losing any interrupts when

modifying the RMI and RPI bits the following instruction sequence is recommended:

ld MISR, # 0x9F; reset both RMI and RPI bits.

ld MISR, # 0xBF; set RMI bit.

ld MISR, # 0xDF; set RPI bit.

Control register A (MCRA)

1DI

End of demagnetization interrupt flag

0: No end of demagnetization interrupt pending

1: End of demagnetization interrupt pending

0CI

Commutation/capture interrupt flag

0: No commutation/capture interrupt pending

1: Commutation/capture interrupt pending

Table 125.

MISR register description (continued)

Bit Name

Function

MCRA

Reset value: 0000 0000 (00h)

654

MOE

CKE

DAC

V0C1

SWA

DCB

R/W

Table 126.

MCRA register description

Bit Name

Function

MOE

Output enable bit

0: Outputs disabled; MC0[5:0] outputs are put in reset state(1)(2)

1: Outputs enabled; MC0[5:0] outputs enabled

Obsolete

Product(s)

- Obsolete

Product(s)

ST7MC1K2 数据表(PDF) 265 Page - STMicroelectronics

ST7MC1K2 数据表(HTML) 265 Page - STMicroelectronics

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

数据表下载

链接网址

ST7MC1K2 数据表(PDF) 265 Page - STMicroelectronics

ST7MC1K2 数据表(HTML) 265 Page - STMicroelectronics

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

数据表 下载

链接网址

数据表下载