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ST7MC1K2 数据表(PDF) 269 Page - STMicroelectronics

部件名 ST7MC1K2
功能描述  Clock, reset and supply management
PDF  371 Pages
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制造商  STMICROELECTRONICS [STMicroelectronics]
网页  http://www.st.com
标志 STMICROELECTRONICS - STMicroelectronics

ST7MC1K2 数据表(HTML) 269 Page - STMicroelectronics

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Obsolete
Product(s)
- Obsolete
Product(s)
ST7MC1K2-Auto, ST7MC1K6-Auto, ST7MC2S4-Auto, ST7MC2S6-Auto
On-chip peripherals
269/371
Note:
For more details, see Step behavior diagrams (Figure 110 and Figure 111).
Table 132.
Over current handling
CLIM bit
CLI bit
OCV bit
Output effect
Interrupt
0
0
x
Normal running mode
No
0
1
x
PWM is put off as current loop effect
No
1
0
x
Normal running mode
No
1
1
0
PWM is put off as current loop effect
Yes
1
1
1
All MCOx outputs are put in reset state (MOE reset)(1)
1.
This feature is also available when using the three PWM outputs (PCN bit = 1 in the MDTG register),
providing that the VOC1bit = 0 (MCRA register). See Over current handling in voltage mode on page 234.
Yes
Table 133.
Step behavior/sensorless mode
OS2 bit
PWM after C and
before D
OS1 bit
PWM after D and
before Z
OS0
PWM after Z and
before next C
0
On high channels
0
On high channels
0
On high channels
1
On low channels
1
On low channels
0
On high channels
1
On low channels
1
On low channels
0
On high channels
0
On high channels
1
On low channels
1
On low channels
0
On high channels
1
On low channels
Table 134.
PWM mode when SR = 1
OS2 bit
PWM after C and
before Z
OS1 bit
Unused
OS0
PWM after Z and before
next C
0
On high channels
x
x
0
On high channels
1
On low channels
1
On low channels
x
x
0
On high channels
1
On low channels
Table 135.
PWM mode when DAC = 1
OS2 bit
Unused
OS1 bit
Unused
OS0
PWM on outputs
xx
x
x
0
On high channels
1
On low channels
Obsolete
Product(s)
- Obsolete
Product(s)



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