STM32F042F4 datasheet(24/117 Pages) STMICROELECTRONICS

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Functional overview

STM32F042x4 STM32F042x6

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DocID025832 Rev 5

The RTC is an independent BCD timer/counter. Its main features are the following:

•

calendar with subseconds, seconds, minutes, hours (12 or 24 format), week day, date,

month, year, in BCD (binary-coded decimal) format

•

automatic correction for 28, 29 (leap year), 30, and 31 day of the month

•

programmable alarm with wake up from Stop and Standby mode capability

•

on-the-fly correction from 1 to 32767 RTC clock pulses. This can be used to

synchronize the RTC with a master clock

•

digital calibration circuit with 1 ppm resolution, to compensate for quartz crystal

inaccuracy

•

two anti-tamper detection pins with programmable filter. The MCU can be woken up

from Stop and Standby modes on tamper event detection

•

timestamp feature which can be used to save the calendar content. This function can

be triggered by an event on the timestamp pin, or by a tamper event. The MCU can be

woken up from Stop and Standby modes on timestamp event detection

•

reference clock detection: a more precise second source clock (50 or 60 Hz) can be

used to enhance the calendar precision

The RTC clock sources can be:

•

a 32.768 kHz external crystal

•

a resonator or oscillator

•

the internal low-power RC oscillator (typical frequency of 40 kHz)

•

the high-speed external clock divided by 32

3.14

Inter-integrated circuit interface (I2C)

The I2C interface (I2C1) can operate in multimaster or slave modes. It can support Standard

mode (up to 100 kbit/s), Fast mode (up to 400 kbit/s) and Fast Mode Plus (up to 1 Mbit/s)

with 20 mA output drive.

It supports 7-bit and 10-bit addressing modes, multiple 7-bit slave addresses (two

addresses, one with configurable mask). It also includes programmable analog and digital

noise filters.

In addition, I2C1 provides hardware support for SMBUS 2.0 and PMBUS 1.1: ARP

capability, Host notify protocol, hardware CRC (PEC) generation/verification, timeouts

verifications and ALERT protocol management. I2C1 also has a clock domain independent

Table 8. Comparison of I2C analog and digital filters

Aspect

Analog filter

Digital filter

Pulse width of

suppressed spikes

≥ 50 ns

Programmable length from 1 to 15

I2Cx peripheral clocks

Benefits

Available in Stop mode

–Extra filtering capability vs.

standard requirements

–Stable length

Drawbacks

Variations depending on

temperature, voltage, process

Wakeup from Stop on address

match is not available when digital

filter is enabled.

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