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STM32F769AI 数据表(PDF) 196 Page - STMicroelectronics |
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STM32F769AI 数据表(HTML) 196 Page - STMicroelectronics |
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196 / 255 page  Electrical characteristics STM32F765xx STM32F767xx STM32F768Ax STM32F769xx 196/255 DocID029041 Rev 4 Refer to Section 5.3.20: I/O port characteristics for more details on the input/output characteristics. Asynchronous waveforms and timings Figure 61 through Figure 64 represent asynchronous waveforms and Table 100 through Table 107 provide the corresponding timings. The results shown in these tables are obtained with the following FMC configuration: • AddressSetupTime = 0x1 • AddressHoldTime = 0x1 • DataSetupTime = 0x1 (except for asynchronous NWAIT mode , DataSetupTime = 0x5) • BusTurnAroundDuration = 0x0 • Capcitive load CL = 30 pF In all timing tables, the THCLK is the HCLK clock period Figure 61. Asynchronous non-multiplexed SRAM/PSRAM/NOR read waveforms 1. Mode 2/B, C and D only. In Mode 1, FMC_NADV is not used. |
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