STM32F769AI datasheet(197/255 Pages) STMICROELECTRONICS

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DocID029041 Rev 4

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STM32F765xx STM32F767xx STM32F768Ax STM32F769xx

Electrical characteristics

224

Table 100. Asynchronous non-multiplexed SRAM/PSRAM/NOR read timings(1)(2)

1. CL = 30 pF.

2. Guaranteed by characterization results.

Symbol

Parameter

Min

Max

Unit

tw(NE)

FMC_NE low time

2THCLK − 12 THCLK +1

tv(NOE_NE)

FMC_NEx low to FMC_NOE low

0.5

tw(NOE)

FMC_NOE low time

2THCLK − 12THCLK + 1

th(NE_NOE)

FMC_NOE high to FMC_NE high hold time

tv(A_NE)

FMC_NEx low to FMC_A valid

0.5

th(A_NOE)

Address hold time after FMC_NOE high

tv(BL_NE)

FMC_NEx low to FMC_BL valid

0.5

th(BL_NOE)

FMC_BL hold time after FMC_NOE high

tsu(Data_NE)

Data to FMC_NEx high setup time

THCLK − 1-

tsu(Data_NOE)

Data to FMC_NOEx high setup time

THCLK − 1-

th(Data_NOE)

Data hold time after FMC_NOE high

th(Data_NE)

Data hold time after FMC_NEx high

tv(NADV_NE)

FMC_NEx low to FMC_NADV low

tw(NADV)

FMC_NADV low time

THCLK + 1

Table 101. Asynchronous non-multiplexed SRAM/PSRAM/NOR read - NWAIT

timings(1)

1. Guaranteed by characterization results.

Symbol

Parameter

Min

Max

Unit

tw(NE)

FMC_NE low time

7THCLK +1 7THCLK +1

tw(NOE)

FMC_NWE low time

5THCLK −15THCLK +1

tw(NWAIT)

FMC_NWAIT low time

THCLK −0.5

tsu(NWAIT_NE)

FMC_NWAIT valid before FMC_NEx high

5THCLK +1.5

th(NE_NWAIT)

FMC_NEx hold time after FMC_NWAIT invalid

4THCLK+1

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