PC87334VLJ datasheet(2/102 Pages) NSC

2 / 102 page

General Description (Continued)

A set of eight configuration registers are provided to control

various functions of the PC87334 These registers are ac-

cessed using two 8-bit wide index and data registers The

ISA IO address of the register pair can be relocated using a

power-up strapping option

When idle advanced power management features allows

the PC87334 to enter extremely low power modes under

hardware or software control The PC87334 can operate

from a 5V or a 33V power supply An unique IO cell struc-

ture allows the PC87334 to interface directly with 5V exter-

nal components while operating from a 33V power supply

Features (Continued)

The UARTs

Software compatible with the PC16550A and

PC16450

MIDI baud rate support

Infrared support on UART2 (IrDA-compliant)

The IDE Control Logic

All IDE control signals with DMA support provided

Only external signal buffers required to implement

full IDE interface

The Address Decoder

Provides selection of all primary and secondary ISA

addresses including COM1 – 4 and LPT1 – 3

Enhanced Power Management

Special configuration registers for power-down

Enhanced programmable power-down FDC

command

Auto power-down and wake-up modes

3 special pins for power management

Typical current consumption during power-down is

less than 10 mA

Reduced pin leakage current

Mixed Voltage Support

Supports standard 5V operation

Supports 33V operation

Supports mixed internal 33V operation with 33V5V

external configuration

100-Pin TQFP packagePC87334VJG

100-Pin PQFP packagePC87334VLJ

PC87334VLJ 数据表(PDF) 2 Page - National Semiconductor (TI)

PC87334VLJ 数据表(HTML) 2 Page - National Semiconductor (TI)

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