RT5021 datasheet(36/67 Pages) RICHTEK

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RT5021

DS5021-01 April 2013

www.richtek.com

is a registered trademark of Richtek Technology Corporation.

VDDM Bootstrap

To support bootstrap function, the RT5021 provides a power selection circuit which selects the maximum voltage

between SYS and PVD1 to support the power requirement at node VDDI. The RT5021 includes UVLO circuits to

monitor VDDI and SYS voltage status.

Figure 3

Charger Unit

The RT5021 includes a Li-ion battery charger with Automatic Power Path Management. The charger is designed to

operate in below modes :

Pre-Charge Mode

When the output voltage is lower than 2.8V, the charging current will be reduced to a ratio of the fast-charge current

set by A8.ISETA [3:0] to protect the battery life-time. The timing diagram is showed in Figure 3.

Fast-Charge Mode

When the output voltage is higher than 3V, the charging current will be equal to the fast-charge current set by

A8.ISETA [3:0] shown as Figure 3.

Constant Voltage Mode

When the output voltage is near 4.2V and the charging current falls below the termination current for a deglitch time

of 25ms, the charger will be disabled and CHG will go high. The timing diagram is showed in Figure 3.

Re-Charge Mode

When the chip is in charge termination mode, the charging current gradually goes down to zero. Once the battery

voltage drops to below 4.1V for a deglitch time of 100ms, the charger will resume charging shown as Figure 3.

SYS

PVD1

VDDI = Max (SYS, PVD1)

4.16 to 4.2 to 4.23V

−40°C to 85°C

Battery Voltage

Charging Current

VPRECH

VRECH

ITERM2

If ISETL = 0, ISETU = 0

ITERMI = 3.3% x ICHG_FAST

ISETL = 1, ISETU = 1

ISETL = 0, ISETU = X

ITERMI = 10% x ICHG_FAST

Time

ICHG_PRE = 10% x ICHG_FAST

RT5021 数据表(PDF) 36 Page - Richtek Technology Corporation

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