RT5021 datasheet(4/67 Pages) RICHTEK

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RT5021

DS5021-01 April 2013

www.richtek.com

is a registered trademark of Richtek Technology Corporation.

Functional Pin Description

Pin No.

Pin Name

Pin Function

WAKE

Wake-Up Impulse Push Pull Output. If VIN or BAT plug in, WAKE pin generates one

90ms-width high pulse to notify micro processor.

PVD1

Power Output pin of CH1. To make CH1 stable, the power path from the pin PVD1 to its

output capacitors must be as short (

≤1mm is better) and wide as possible to reduce its

parasitic inductance. The output capacitor must be ceramic capacitor (

≥20μF).

LX1

Switch Node of CH1.

CHG2

2nd Charger Status Indicator (Open Drain Output).

FB7

Feedback Input Pin of CH7 in Step-Up Mode or Current Regulator Mode

PVD7

Power Output Pin of CH7 in Step-Up or Power Input Pin of CH7 in Current Regulator

Mode.

LX7

Switch Node of CH7 in Step-Up Mode.

LX7 initial voltage determine CH7 operation mode.

CHG

Charger Status Indicator (Open Drain Output).

VO6

Power Output Pin of CH6.

PVD6

Power Input Pin of CH6.

FB4

Feedback Input Pin of CH4.

SEQ

Power Sequence Selection for CH1 to CH4.

LX4

Switch Node of CH4.

Enable Pin of Power Converter Unit.

PVD45

Power Input Pin of CH4 and CH5. To avoid the crosstalk between CH4 and CH5, the

power path from the pin PVD45 to its input capacitors must be as short (

≤1mm is better)

and wide as possible to reduce its parasitic inductance. The input capacitance must be

≥10μF with low ESR.

LX5

Switch Node of CH5.

INT

Interrupt Indicator Open Drain Output. If events of NoBAT, THR, EOC, Battery

Temperature Change (TS_METER), PGOOD, SAFE, VIN DPM, or Charge Type

Detection Finishing (CHGRUN) happen, the output INT goes low and the INT bit in I

VO5/FB5

Output Voltage Sense Pin or feedback network input pin of CH5. The function is

selected by I

C register.

PVD8

Power Input Pin of CH8.

SDA

Data Signal Pin of I

C Interface.

SCL

Clock Signal Pin of I

2C Interface.

VO8

Power Output Pin of CH8.

FB2

Feedback Input Pin of CH2.

VO2

Power Output Pin of CH2.

LX2B

Switch Node B of CH2.

LX2A

Switch Node A of CH2.

PVD2

Power Input Pin of CH2.

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