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WM8971LEFL/R 数据表(PDF) 19 Page - Wolfson Microelectronics plc

部件名 WM8971LEFL/R
功能描述  STEREO CODEC FOR PORTABLE AUDIO APPLLICATIONS
PDF  56 Pages
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制造商  WOLFSON [Wolfson Microelectronics plc]
网页  http://www.wolfsonmicro.com
标志 WOLFSON - Wolfson Microelectronics plc

WM8971LEFL/R 数据表(HTML) 19 Page - Wolfson Microelectronics plc

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Advanced Information
WM8971L
w
AI Rev 3.0 March 2004
19
The MICBIAS output provides a low noise reference voltage suitable for biasing electret type
microphones and the associated external resistor biasing network. Refer to the Applications
Information section for recommended external components. The output can be enabled or disables
using the MICB control bit (see also the “Power Management” section).
REGISTER
ADDRESS
BIT
LABEL
DEFAULT
DESCRIPTION
R25 (19h)
Power
Management (1)
1
MICB
0
Microphone Bias Enable
0 = OFF (high impedance output)
1 = ON
Table 5 Microphone Bias Control
The internal MICBIAS circuitry is shown below. Note that the is a maximum source current capability
for MICBIAS is 3mA. The external biasing resistors therefore must be large enough to limit the
MICBIAS current to 3mA.
AGND
MICBIAS
= 1.8 x VMID
= 0.9 X AVDD
VMID
internal
resistor
internal
resistor
MICB
Figure 6 Microphone Bias Schematic
PGA CONTROL
The PGA matches the input signal level to the ADC input range. The PGA gain is logarithmically
adjustable from +30dB to –17.25dB in 0.75dB steps. Each PGA can be controlled either by the user
or by the ALC function (see Automatic Level Control). When ALC is enabled for one or both
channels, then writing to the corresponding PGA control register has no effect.
The gain is independently adjustable on both Right and Left Line Inputs. However, by setting the
LIVU or RIVU bits whilst programming the PGA gain, both channels are simultaneously updated.
This reduces the required number of software writes required. Setting the LZCEN and RZCEN bits
enables a zero-cross detector which ensures that PGA gain changes only occur when the signal is at
zero, eliminating any zipper noise. If zero cross is enabled a timeout is also available to update the
gain if a zero cross does not occur. This function may be enabled by setting TOEN in register R23
(17h).



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