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WM8971LEFL/R 数据表(PDF) 33 Page - Wolfson Microelectronics plc |
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WM8971LEFL/R 数据表(HTML) 33 Page - Wolfson Microelectronics plc |
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33 / 56 page ![]() Advanced Information WM8971L w AI Rev 3.0 March 2004 33 ENABLING THE OUTPUTS Each analogue output of the WM8971L can be separately enabled or disabled. The analogue mixer associated with each output is powered on or off along with the output pin. All outputs are disabled by default. To save power, unused outputs should remain disabled. Outputs can be enabled at any time, except when VREF is disabled (VR=0), as this may cause pop noise (see “Power Management” and “Applications Information” sections) REGISTER ADDRESS BIT LABEL DEFAULT DESCRIPTION 6 LOUT1 0 LOUT1 Enable 5 ROUT1 0 ROUT1 Enable 4 LOUT2 0 LOUT2 Enable 3 ROUT2 0 ROUT2 Enable R26 (1Ah) Power Management (2) 2 MONO 0 MONOOUT Enable Note: All “Enable” bits are 1 = ON, 0 = OFF Table 23 Analogue Output Control Whenever an analogue output is disabled, it remains connected to VREF (pin 20) through a resistor. This helps to prevent pop noise when the output is re-enabled. The resistance between VREF and each output can be controlled using the VROI bit in register 27. The default is low (1.5k Ω), so that any capacitors on the outputs can charge up quickly at start-up. If a high impedance is desired for disabled outputs, VROI can then be set to 1, increasing the resistance to about 40k Ω. REGISTER ADDRESS BIT LABEL DEFAULT DESCRIPTION R27 (1Bh) Additional (1) 6 VROI 0 VREF to analogue output resistance 0: 1.5 k Ω 1: 40 k Ω Table 24 Disabled Outputs to VREF Resistance HEADPHONE SWITCH The HPDETECT pin can be used as a headphone switch control input to automatically disable the speaker output and enable the headphone output e.g. when a headphone is plugged into a jack socket. In this mode, enabled by setting HPSWEN, HPDETECT switches between headphone and speaker outputs (e.g. when the pin is connected to a mechanical switch in the headphone socket to detect plug-in). The HPSWPOL bit reverses the pin’s polarity. Note that the LOUT1, ROUT1, LOUT2 and ROUT2 bits in register 26 must also be set for headphone and speaker output (see Table 25 and Table 26). HPSWEN HPSWPOL HPDETECT (PIN23) L/ROUT1 (REG. 26) L/ROUT2 (REG. 26) HEADPHONE ENABLED SPEAKER ENABLED 0 X X 0 0 no no 0 X X 0 1 no yes 0 X X 1 0 yes no 0 X X 1 1 yes yes 1 0 0 X 0 no no 1 0 0 X 1 no yes 1 0 1 0 X no no 1 0 1 1 X yes no 1 1 0 0 X no no 1 1 0 1 X yes no 1 1 1 X 0 no no 1 1 1 X 1 no yes Table 25 Headphone Switch Operation |
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