WM8972LEFLSLASHR datasheet(13/49 Pages) WOLFSON

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Preliminary Technical Data

WM8972L

PTD Rev 2.2 June 2004

DEVICE DESCRIPTION

INTRODUCTION

The WM8972L is a low power audio CODEC offering a combination of high quality audio, advanced

features, low power and small size. These characteristics make it ideal for portable digital audio

applications such as digital still cameras and toys.

The device includes two differential analogue inputs that can be switched internally. Each can be

used as either a line level input or microphone input and INPUT1+/INPUT1- and INPUT2+/INPUT2-

can be configured as mono differential inputs. A programmable gain amplifier with automatic level

control (ALC) keeps the recording volume constant. The on-chip ADC and DAC are of a high quality

using a multi-bit, low-order oversampling architecture to deliver optimum performance with low power

consumption.

The DAC output signal first enters an analogue mixer where an analogue input and/or the post-ALC

signal can be added to it.

The WM8972L has a configurable digital audio interface where ADC data can be read and digital

audio playback data fed to the DAC. It supports a number of audio data formats including I

2S, DSP

Mode (a burst mode in which frame sync plus 2 data packed words are transmitted), MSB-First, left

justified and MSB-First and right justified. It can operate in master or slave modes.

The WM8972L uses a unique clocking scheme that can generate many commonly used audio

sample rates from either a 12.00MHz USB clock or an industry standard 256/384 fs clock. This

feature eliminates the common requirement for an external phase-locked loop (PLL) in applications

where the master clock is not an integer multiple of the sample rate. Sample rates of 8kHz,

11.025kHz, 12kHz, 16kHz, 22.05kHz, 24kHz, 32kHz, 44.1kHz, 48kHz, 88.2kHz and 96kHz can be

generated. The digital filters used for recording and playback are optimised for each sampling rate

used.

To allow full software control over all its features, the WM8972L offers a choice of 2 or 3 wire MPU

control interface. It is fully compatible with and an ideal partner for a wide range of industry standard

microprocessors, controllers and DSPs.

The design of the WM8972L has given much attention to power consumption without compromising

performance. It operates at very low voltages, and includes the ability to power off parts of the

circuitry under software control, including standby and power off modes.

INPUT SIGNAL PATH

The input signal path for each channel consists of a switch to select between two analogue inputs,

followed by a PGA (programmable gain amplifier) and an optional microphone gain boost. A

differential input of either (INPUT1+ – INPUT1-) or (INPUT2+ – INPUT2-) may also be selected. The

gain of the PGA can be controlled either by the user or by the on-chip ALC function (see Automatic

Level Control). The signal then enters an ADC where it is digitised.

SIGNAL INPUTS

The WM8972L has two sets of high impedance, low capacitance AC coupled analogue inputs,

INPUT1+/INPUT1- and INPUT2+/INPUT2-. Inputs can be configured as microphone or line level by

enabling or disabling the microphone gain boost.

The INSEL control bits (see Table 2) are used to select independently between external inputs and

internally generated differential products. The choice of differential signal, INPUT1+ – INPUT1- or

INPUT2+ – INPUT2- is made using DS (refer to Table 3).

As an example, the WM8972 can be set up to convert one differential input and route a single ended

signal through the bypass path to the output mixing stage. This is done by applying the differential

signal to INPUT1+ and INPUT1- and the single ended signal to INPUT2-. By setting DS to INPUT1+

and INPUT1- (see Table 3) and +/-MIXSEL to INPUT2+/-, each mono signal can be routed

separately.

The inputs can also be configured as BEEP inputs by selecting the bypass path directly to the output

mixing stage. Two BEEP inputs are available if the bypass mode is not used for audio signals,

otherwise one BEEP input is available.

The signal inputs are biased internally to the reference voltage VREF. Whenever the line inputs are

muted or the device placed into standby mode, the inputs are kept biased to VREF using special

anti-thump circuitry. This reduces any audible clicks that may otherwise be heard when changing

inputs.

WM8972LEFL/R 数据表(PDF) 13 Page - Wolfson Microelectronics plc

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