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WM8972LEFL/R 数据表(PDF) 17 Page - Wolfson Microelectronics plc |
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WM8972LEFL/R 数据表(HTML) 17 Page - Wolfson Microelectronics plc |
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17 / 49 page ![]() Preliminary Technical Data WM8972L w PTD Rev 2.2 June 2004 17 DIGITAL ADC VOLUME CONTROL The output of the ADC can be digitally amplified or attenuated over a range from –97dB to +30dB in 0.5dB steps. The gain for a given eight-bit code X is given by: 0.5 × (X-195) dB for 1 ≤ X ≤ 255; MUTE for X = 0 The AVU control bit controls the loading of digital volume control data. When AVU is set to 0, the ADCVOL control data will be loaded into the control register, but will not actually change the digital gain setting. Gain settings are updated when AVU is set to 1. REGISTER ADDRESS BIT LABEL DEFAULT DESCRIPTION 7:0 ADCVOL [7:0] 11000011 ( 0dB ) ADC Digital Volume Control 0000 0000 = Digital Mute 0000 0001 = -97dB 0000 0010 = -96.5dB ... 0.5dB steps up to 1111 1111 = +30dB R21 (15h) ADC Digital Volume 8 AVU 0 ADC Volume Update 0 = Store ADCVOL in intermediate latch (no gain change) 1 = Update gains ( = ADCVOL) Table 7 ADC Digital Volume Control |
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