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AD9268

Rev. A | Page 35 of 44

SERIAL PORT INTERFACE (SPI)

The AD9268 serial port interface (SPI) allows the user to configure

the converter for specific functions or operations through a

structured register space provided inside the ADC. The SPI

gives the user added flexibility and customization, depending on

the application. Addresses are accessed via the serial port and

can be written to or read from via the port. Memory is organized

into bytes that can be further divided into fields, which are docu-

mented in the Memory Map section. For detailed operational

information, see the AN-877 Application Note, Interfacing to

High Speed ADCs via SPI.

CONFIGURATION USING THE SPI

Three pins define the SPI of this ADC: the SCLK/DFS pin, the

SDIO/DCS pin, and the CSB pin (see Table 14). The SCLK/DFS

(a serial clock) is used to synchronize the read and write data

presented from and to the ADC. The SDIO/DCS (serial data

input/output) is a dual-purpose pin that allows data to be sent

to and read from the internal ADC memory map registers. The

CSB (chip select bar) is an active-low control that enables or

disables the read and write cycles.

Table 14. Serial Port Interface Pins

Function

SCLK

Serial Clock. The serial shift clock input, which is used to

synchronize serial interface reads and writes.

SDIO

Serial Data Input/Output. A dual-purpose pin that

typically serves as an input or an output, depending on

the instruction being sent and the relative position in the

timing frame.

CSB

Chip Select Bar. An active-low control that gates the read

and write cycles.

The falling edge of the CSB, in conjunction with the rising edge

of the SCLK, determines the start of the framing. An example of

the serial timing and its definitions can be found in Figure 84

and Table 5.

Other modes involving the CSB are available. When the CSB is

held low indefinitely, which permanently enables the device,

this is called streaming. The CSB can stall high between bytes to

allow for additional external timing. When CSB is tied high, SPI

functions are placed in high impedance mode. This mode turns

on any SPI pin secondary functions.

During an instruction phase, a 16-bit instruction is transmitted.

Data follows the instruction phase, and its length is determined

by the W0 and W1 bits.

In addition to word length, the instruction phase determines

whether the serial frame is a read or write operation, allowing

the serial port to be used both to program the chip and to read

the contents of the on-chip memory. The first bit of the first byte in

a multibyte serial data transfer frame indicates whether a read

command or a write command is issued. If the instruction is a

readback operation, performing a readback causes the serial

data input/output (SDIO) pin to change direction from an input to

an output at the appropriate point in the serial frame.

All data is composed of 8-bit words. Data can be sent in MSB-first

mode or in LSB-first mode. MSB first is the default on power-up

and can be changed via the SPI port configuration register. For

more information about this and other features, see the AN-877

Application Note, Interfacing to High Speed ADCs via SPI.

DON’T CARE

SDIO

SCLK

CSB

tDH

tCLK

tDS

tHIGH

tLOW

R/W

A12

A11

A10

Figure 84. Serial Port Interface Timing Diagram

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