ADRF6520ACPZ-R7 datasheet(5/29 Pages) AD

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Data Sheet

ADRF6520

Rev. 0 | Page 5 of 29

Parameter

Test Conditions/Comments

Min

Typ

Max

Unit

Third Harmonic, HD3

330 MHz fundamental, 1.5 V p-p output level

VGA1 gain = −6 dB, VGA2 = 0 dB

−60.5

dBc

VGA1 gain = 18 dB, VGA2 = 0 dB

−62.5

VGA1 gain = 18 dB, VGA2 = 24 dB

−70.4

dBc

IMD3

496.5 MHz and 503.5 MHz tones, 1.5 V p-p composite

output

VGA1 gain = −6 dB, VGA2 = 0 dB

−68.8

dBc

VGA1 gain = 18 dB, VGA2 = 0 dB

−70

dBc

VGA1 gain = 18 dB, VGA2 = 24 dB

−77

dBc

DIGITAL LOGIC

LE, CLK, DATA, SDO

Input High Voltage, VHIGH

Input Low Voltage, VLOW

<0.8

Input Current, IHIGH/ILOW

µA

Input Capacitance, CIN

SPI TIMING

LE, CLK, DATA, SDO

fCLK

1/tCLK

MHz

tDH

DATA hold time

tDS

DATA setup time

tLH

LE hold time

tLS

LE setup time

tPW

CLK high pulse width

CLK to SDO delay

POWER AND ENABLE

VPS, VPSD, COM, COMD, ENBL

Supply Voltage Range

3.15

3.3

3.45

Total Supply Current

ENBL = 3.3 V

Maximum bandwidth setting

425

Filter bypassed

390

Disable Current

ENBL = 0 V

Disable Threshold

1.6

Enable Response Time

Delay following ENBL low to high transition

µs

Disable Response Time

Delay following ENBL high to low transition

300

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