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ADAU1361BCPZ-R7 数据表(PDF) 8 Page - Analog Devices

部件名 ADAU1361BCPZ-R7
功能描述  Audio Codec
PDF  80 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
制造商  AD [Analog Devices]
网页  http://www.analog.com
标志 AD - Analog Devices

ADAU1361BCPZ-R7 数据表(HTML) 8 Page - Analog Devices

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ADAU1361
Data Sheet
Rev. D | Page 8 of 80
TYPICAL CURRENT CONSUMPTION
Master clock = 12.288 MHz, input sample rate = 48 kHz, input tone = 1 kHz, normal power management settings, ADC input @ −1 dBFS,
DAC input @ 0 dBFS. For total power consumption, add the IOVDD current listed in Table 2.
Table 3.
Operating Voltage
Audio Path
Clock Generation
Typical AVDD Current
Consumption (mA)
AVDD = IOVDD = 3.3 V
Record stereo differential to ADC
Direct MCLK
5.24
Integer PLL
6.57
DAC stereo playback to line output (10 kΩ)
Direct MCLK
5.55
Integer PLL
6.90
DAC stereo playback to headphone (16 Ω)
Direct MCLK
55.5
Integer PLL
56.8
DAC stereo playback to headphone (32 Ω)
Direct MCLK
30.9
Integer PLL
32.25
DAC stereo playback to capless headphone (32 Ω)
Direct MCLK
56.75
Integer PLL
58
Record aux stereo bypass to line output (10 kΩ)
Direct MCLK
1.9
Integer PLL
3.3
AVDD = IOVDD = 1.8 V
Record stereo differential to ADC
Direct MCLK
4.25
Integer PLL
5.55
DAC stereo playback to line output (10 kΩ)
Direct MCLK
4.7
Integer PLL
5.7
DAC stereo playback to headphone (16 Ω)
Direct MCLK
30.81
Integer PLL
32
DAC stereo playback to headphone (32 Ω)
Direct MCLK
18.3
Integer PLL
19.5
DAC stereo playback to capless headphone (32 Ω)
Direct MCLK
32.6
Integer PLL
33.7
Record aux stereo bypass to line output (10 kΩ)
Direct MCLK
1.9
Integer PLL
3.07



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