SSM2519ACBZ-R7 datasheet(15/28 Pages) AD

15 / 28 page

Data Sheet

SSM2519

Rev. 0 | Page 15 of 28

DIGITAL AUDIO FORMATS

STEREO MODE

0x02[4:2], SAI = 0 (stereo: I2S, LJ, RJ)

0x02[6:5], SDATA_FMT = 0 (I2S), 1 (LJ), 2 (RJ 24-bit), 3 (RJ 16-bit)

Figure 26. Stereo Modes: I2S, Left Justified, and Right Justified

TDM, 50% DUTY CYCLE MODE

0x02[4:2], SAI = 1 (2 channels), 2 (4 channels), 3 (8 channels), 4 (16 channels)

0x02[6:5], SDATA_FMT = 0 (I2S), 1 (LJ), 2 (RJ 24-bit), 3 (RJ 16-bit)

0x03[1], BCLK_EDGE = 0 (rising BCLK edge used)

0x03[6], LRCLK_MODE = 0 (50% duty cycl LRCLK)

0x03[3:2], SLOT_WIDTH = 0 (32 BCLK cycles), 1 (24 BCLK cycles), 2 (16 BCLK cycles)

Figure 27. TDM Modes with 50% Duty Cycle LRCLK

TDM, PULSE MODE

0x02[4:2], SAI = 1 (2 channels), 2 (4 channels), 3 (8 channels), 4 (16 channels)

0x02[6:5], SDATA_FMT = 0 (I2S), 1 (LJ), 2 (RJ 24-bit), 3 (RJ 16-bit)

0x03[1], BCLK_EDGE = 0 (rising BCLK edge used)

0x03[6], LRCLK_MODE = 1 (pulse mode LRCLK)

0x03[3:2], SLOT_WIDTH = 0 (32 BCLK cycles), 1 (24 BCLK cycles), 2 (16 BCLK cycles)

Figure 28. TDM Modes with Pulse Mode LRCLK

ANY NUMBER BCLKs

8 TO 32 BCLKs

LEFT CHANNEL

RIGHT CHANNEL

LEFT CHANNEL

RIGHT CHANNEL

LEFT CHANNEL

BCLK

LRCLK

SDATA I2S

SDATA LJ

SDATA RJ

32/24/16 BCLKs

CHANNEL 1

CHANNEL 2

CHANNEL N

8 TO 32 BCLKs

24 TO 16 BCLKs

24 OR 16 BCLKs

BCLK

LRCLK

SDATA I2S

SDATA LJ

SDATA RJ

32/24/16 BCLKs

CHANNEL 1

CHANNEL 2

CHANNEL N

8 TO 32 BCLKs

24 OR 16 BCLKs

BCLK

LRCLK

SDATA I2S

SDATA LJ

SDATA RJ

SSM2519ACBZ-R7 数据表(PDF) 15 Page - Analog Devices

SSM2519ACBZ-R7 数据表(HTML) 15 Page - Analog Devices

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28

数据表下载

链接网址

SSM2519ACBZ-R7 数据表(PDF) 15 Page - Analog Devices

SSM2519ACBZ-R7 数据表(HTML) 15 Page - Analog Devices

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28

数据表 下载

链接网址

数据表下载