SSM2519ACBZ-R7 datasheet(23/28 Pages) AD

23 / 28 page

Data Sheet

SSM2519

Rev. 0 | Page 23 of 28

SERIAL AUDIO INTERFACE CONTROL REGISTER

Address: 0x03, Reset: 0x00, Name: SAI_FMT2

Table 19. Bit Descriptions for SAI_FMT2

Bits

Bit Name

Settings

Description

Reset

Access

BCLK_GEN

BCLK internal generation. When BCLK_GEN is enabled, an internally

generated BCLK is used. Therefore, routing the BCLK signal to the pin is

not required.

0x0

External BCLK used

Internally generated BCLK used

LRCLK_MODE

LRCLK mode selection for TDM operation.

0x0

50% duty cycle LRCLK

Pulse mode LRCLK

LRCLK_POL

LRCLK polarity control.

0x0

Normal LRCLK operation

Inverted LRCLK operation

SAI_MSB

SDATA bit stream order.

0x0

MSB first SDATA

LSB first SDATA

[3:2]

SLOT_WIDTH

BCLK cycles per frame in TDM modes select.

0x0

32 BCLK cycles per slot

24 BCLK cycles per slot

16 BCLK cycles per slot

Reserved

BCLK_EDGE

BCLK active edge select.

0x0

Rising BCLK edge used

Falling BCLK edge used

RESERVED

Reserved.

0x0

SSM2519ACBZ-R7 数据表(PDF) 23 Page - Analog Devices

SSM2519ACBZ-R7 数据表(HTML) 23 Page - Analog Devices

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28

数据表下载