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CS42406 数据表(PDF) 6 Page - Cirrus Logic

部件名 CS42406
功能描述  24-BIT, 192kHz 2-IN 6-OUT AUDIO CODEC
PDF  50 Pages
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制造商  CIRRUS [Cirrus Logic]
网页  http://www.cirrus.com
标志 CIRRUS - Cirrus Logic

CS42406 数据表(HTML) 6 Page - Cirrus Logic

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CS42406
6
DS614PP5
1.
PIN DESCRIPTION
Pin Name
#
Pin Description
DAC_SCLK
1
DAC Serial Clock (
Input) - Serial clock for the DAC serial audio interface.
DAC_LRCK
2
DAC Left Right Clock (
Input) - Determines which channel, Left or Right, is currently active on the
DAC serial audio data line.
MCLK
3
Master Clock (
Input) - Clock source for the delta-sigma modulators and digital filters.
VLS
4
45
Serial Audio Interface Power (
Input) - Positive power for the serial audio interface.
SDOUT
5
Serial Audio Data Output
(Output) - Output for two’s complement serial audio data.
ADC_384x/256x
6
ADC MCLK/LRCK Ratio Select
(Input) - Selects the base MCLK/LRCK ratio for the ADC serial
port.
VD
7
9
Digital Power (
Input) - Positive power supply for the digital section.
GND
8
31
33
Ground (
Input)
RST_DAC
10
DAC Reset (
Input) - Powers down the DAC and resets all internal resisters to their default settings.
ADC_SCLK
11
ADC Serial Clock (
Input/Output) - Serial clock for the ADC serial audio interface.
ADC_LRCK
12
ADC Left Right Clock (
Input/Output) - Determines which channel, Left or Right, is currently active
on the ADC serial audio data line.
VLC
16
Control Port Interface Power (
Input) - Positive power for the control port interface.
ADC_PDN
18
ADC Power-Down
(Input) - The ADC enters a low power mode when low.
TST
19,20
23,27
35,42
Test Pin
(Input) - Connect to GND.
GND
GND
AOUTB3
TST
ADC_FILT+
VA
AOUTA3
MUTEC3
6
2
4
8
10
1
3
5
7
9
11
12
13 14 15 16 17 18 19 20 21 22 23 24
31
35
33
29
27
36
34
32
30
28
26
25
48 47 46 45 44 43 42 41 40 39 38 37
ADC_384x/256x
DAC_LRCK
VLS
GND
DAC_RST
DAC_SCLK
MCLK
SDOUT
VD
ADC_SCLK
ADC_LRCK
VD
CS42406
TST
AOUTB2
AINR
ADC_VQ



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